Camtek Ltd.NASDAQ: CAMT

Investors Presentation

Oct 14, 2026 at 10:07 AM EDT · Issued by Camtek Ltd.

On 6ix: 6ix.com/news/camtek-investors-presentation

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WELCOME TO CAMTEK'S ANALYST & INVESTOR PRESENTATION - OCTOBER 14, 2026

Camtek at a glance High-end inspection and metrology systems provider for the semiconductor manufacturing market

~ $ M

2026E revenues

Customers, incl. all top 20 semi manufacturers with 4000 installed base

~ %

Revenue CAGR, 2019-2025

>$ M

Cash, Deposits and Cash Equivalent

Employees

Camtek is a key enabler of

AI-driven semiconductor innovation

Grand Hyatt San Francisco, Union Square | October 14, 2026

Today's Presenters

Executive Chairman Chief Executive Officer Chief Financial Officer President and COO Marketing Director

Breaking News - Record Revenue Levels Q3 preannouncement, Q4 guidance and a first look at 2027

01 Q3 2026

Preannouncing Q3 revenues

02 Q4 2026

Q4 guidance

03 FY 2027

2027 initial revenue outlook

+27% YoY

+40% YoY

Bringing FY 2026 to ~$595M

> +35% over FY 2026E

Semiconductors Market Forecast

$3,5T

$3,0T

$3T

$2,5T

$2.3T

$2,0T

$1,5T

$1.7T

$1,0T

$0,5T

$0,65T

$0,0T

The Momentum Continues

2024 2026F 2028F 2030F

Source: TechInsights 2026 forecast

Our Path to Double Our Revenues

Organic growth targets $1.2B in annual revenue in ~3 years

GROWTH ENGINES

AI data centers & accelerated computing

Compute for AI training and inference

Physical & edge AI

Camtek's primary market

2026E 2027E Target in ~3 years

Robotics, autonomous vehicles, drones, smart vision, industrial automation, and AI-powered wearables.

Advanced Packaging: Our Main Market More Volume, More Complexity

HBM
- More capacity
- More memory layers
- Higher complexity
2.5D / 3D Integration
- 2.5D continues to expand
- More devices & interfaces
- Increasing architectural complexity
  CoWoS, Foveros and other advanced interposers
Photonics
- Critical to Al infrastructure
- Moving into 2.5D integration

Advanced packaging is scaling

Why Camtek Is Built to Win We Are Positioned at the Heart of the AI Advanced Packaging Transition

Leading capabilities in 2D Inspection, 3D bump Metrology and Metrology
Strong position in the most demanding Advanced Packaging applications
Breakthrough innovations in optics and AI-based defect detection & metrology
Manufacturing capacity and supply-chain infrastructure are being expanded to support the next level of growth
The foundation for growth is already in place.
Strong relationships with the world's leading Foundries, IDMs, OSATs and Memory manufacturers
Early involvement in customers' next-generation process development
Close alignment of our roadmap with customers' future technology requirements
A large global installed base creating opportunities for: Upgrades,

New Applications Software, Additional Capacity

Winning is in our DNA. We've proven it before, and we're ready to do it again.

Winning is in our DNA. We've proven it before, and we're ready to do it again.

Camtek Organic Growth Strategy

Advanced Packaging is an Enabler for AI AI demands drive new packaging technologies, and with them more complexity

WHAT AI DEMANDS HOW PACKAGING RESPONDS

Compute

Best-in-class computation

Memory

Very high memory capacity

High-end advanced packaging

Technologies AI data centers require

2.5D

Platforms Finer pitch

Hybrid bonding Photonics

GPU's, CPUs & Memory on one interposer Foveros + EMIB, CoWoS and variants Over 100M smaller bumps per wafer Bumpless interconnect

Faster data transfer, lower power

Power

High power dissipation

Bandwidth

High data transfer

Edge and physical AI

Robots, vehicles, PCs, phones and wearables

DRAM / HBM Smaller-stack DRAM and HBM

HBF / HBC New high-bandwidth memory

Fan-out + 2.5D Fan-out and 2.5D variations

Data-center building blocks, scaled for the edge

Advanced Packaging grows twice as fast Million 300 mm-equivalent wafers processed, 2025-2031F

Advanced packaging wafers +13% CAGR Total production wafers +7% CAGR

200

150

100

2025 2026F 2027F 2028F 2029F 2030F 2031F

AP is our main business

Source: Techinsights 2026

High-end AP grows twice as fast as the AP market Advanced packaging wafer volume, million 300 mm-equivalent wafers processed, 2025-2031F

AGR

High-end AP (2.5D, 3D, etc) +24% CAGR Fan-in WLP + flip chip | Total AP +13% C

140

105

2025 2026F 2027F 2028F 2029F 2030F 2031F

60%-70% of Camtek Business is in High-End AP

source: Techinsights 2026

Edge AI Will Demand We are only at the beginning of the revolution

UNITS PER YEAR

WHAT INDUSTRY LEADERS SAY

TODAY

AI data-center

GPU Modules 10M

Every edge device will become autonomous. Every edge device will have agentic systems.

Jensen Huang, CEO, NVIDIA

BY 2030

10s of M

GPU Modules Humanoid robots &

autonomous cars

GPU/NPU Modules for AI PCs 100s of M

GenAI smartphones 1B

Edge AI silicon volume:

Memory content in Level 4 and higher autonomous vehicles… each more than an order of magnitude greater than in today's… vehicles. Humanoid robots are expected to have comparable memory and storage requirements to autonomous vehicles.

Sanjay Mehrotra, Chairman and CEO, Micron

The AI race will be won at the edge, where devices, data, and users converge.

Cristiano Amon, CEO, Qualcomm

Silicon Photonics Forecast - new AI growth engine Si PIC die shipments, million units, 2023-2030F

83.9M

2023-2030

30 23M

3.6M

2023 2024 2025 2026F 2027F 2028F 2029F 2030F

Silicon photonics shipments grow by 2030

Source: Yole 2025

SiPh at the

Why the platform moved from promise to production

NOW NEXT GEN

Foundry-level maturity

Datacenter

& AI bandwidth

AI accelerators & memory

TSMC, Tower, GlobalFoundries and others run SiPh in mass production

Fast link between racks In Rack Fast link

For example, COUPE on CoWoS by TSMC

Silicon Photonics Potential for Camtek Integrating photonics with advanced packaging adds new process steps and more silicon

Integration with advanced packaging

Silicon photonics will be integrated with high end advanced packaging (CPO, SoIC, and CoWoS) which is Camtek's home ground

DFB production

new process steps on InP wafers for DFB lasers

PIC fabrication

emerging market, new process steps in mature nodes, within our capabilities

What it adds for Camt

› New process steps

› Advanced packaging

› More silicon

ek:

Sources: TrendForce (Apr 2026) COUPE roadmap and SoIC-X stacking. 16

Micro-Bump Interconnect Still Growing Innovation to maintain market dominance

MICRO- BUMP SCALING

6 µm

Most advanced today

5 µm

Expected to continue using micro-bump interconnect

Next Possible

CAMTEK BUMP METROLOGY

8th gen. Market dominance in advanced packaging

Fan-in and fan-out applications at leading OSATs worldwide

8th + 9th gen. Reference for bump-height metrology

CoWoS and CoWoS-like interposers HBM4 and HBM4e

10TH GENERATION SENSOR, EXPECTED LAUNCH IN 2027

Designed to measure bumps below 5 µm in height

Hybrid Bonding Penetration for HBM and 2.5D Hybrid bonding interconnects as a share of total 2.5D and 3D interconnects, 2026-2030

Hybrid bonding share of 2.5D + 3D interconnects ~3× by 2030

12%

2026 2027 2028 2029 2030

HB growth provides new opportunities for Camtek

Source: Yole 2024 and Camtek analysis

Advanced Packaging is an Enabler for AI AI demands drive new packaging technologies, and with them more complexity

WHAT AI DEMANDS

HOW PACKAGING RESPONDS

THE RESULT

Compute

Best-in-class computation

Memory

Very high memory capacity

High-end advanced packaging

Technologies AI data centers require

2.5D

Platforms Finer pitch

Hybrid bonding Photonics

GPU's, CPUs & Memory on one interposer Foveros + EMIB, CoWoS and variants Over 100M smaller bumps per wafer Bumpless interconnect

Faster data transfer, lower power

Trends leading to

Power

High power dissipation

Bandwidth

High data transfer

Edge and physical AI

Robots, vehicles, PCs, phones and wearables

DRAM / HBM Smaller-stack DRAM and HBM

HBF / HBC New high-bandwidth memory

Fan-out + 2.5D Fan-out and 2.5D variations

Data-center building blocks, scaled for the edge

Why Complexity Accelerates Camtek's Growth

MORE STEPS

3 → 9

RDL layers per package

High-density fan-out triples the redistribution layers. Every added layer is its own inspection and metrology step.

SemiEngineering, Jul 2026

WARPAGE FOR WAFER AND DIE

1 mm → 0.1 mm

Wafer limit → package budget

Warpage shifts at mold, cure, debond and bond. Fan-out, 2.5D and 3DIC need shape metrology at every handoff, wafer and die.

Frontiers in Electronics, Feb 2025

HYBRID BONDING

< 150 nm

Particle detection sensitivity

A sub-150 nm particle creates a void several times its size.

Hybrid bonding pulls front-end-class metrology into the packaging line.

SemiEngineering, Mar 2026

BUMP HEIGHT METROLOGY

<5 µm

Bump height, 100M to 200M

Measuring 100M-200M interconnects at 5micron height or lower demands fundamental shift in metrology technology

Camtek analysis

THE RESULT FOR CAMTEK

More inspection & metrology steps × inspection demands beyond the installed tool base

= Higher inspection and metrology Intensity

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