Andes Technology Corp. · TWSE:6533

Andes Technology — Andes Technology Corp. Investors Conference (April 2025)

37 slides from Andes Technology's conference presentation, Apr 19, 2025

Slide 1: Andes Technology Corp. Investors Conference
Andes Technology Corp. Investors Conference Frankwell Lin Chairman April 19th, 2025
Slide 2: Safe Harbor Notice
Safe Harbor Notice Except for the historical information contained herein, the matters addressed in this presentation are forward-looking statements that involve certain risks and uncertainties that could cause actual results to differ materially, including but not limited to weather, impact of comp
Slide 3: Report Topics
Report Topics ➢ Andes Company Introduction ➢ The Financial & Operation Status ➢ RISC-V, The Trend ➢ The Key Applications & The Trend ➢ The R&D Power for The Future Confidential Subject to change without notice copyright © 2025-2030 Andes Technology 2
Slide 4: Andes Company Introduction
Andes Company Introduction Andes Highlights • Founded in March 2005 in Hsinchu Science Park, Taiwan, ROC. • Well-established high technology IPO company • Over 500 people; 80% are engineers. • TSMC OIP Award “Partner of the Year” for New IP (2015) • Founding Premier membership in the RISC-V Internat
Slide 5: Andes Technology Corporation
Andes Technology Corporation Quick Facts on Andes 20 Years+ 500+ 400+ Customers 17Bn+ SoC Pureplay CPU vendor Employee , > 80% R&D Licensing AndesCore Total Customer Shipment 2024 Operation Result Revenue $ Growth License $ Growth Royalty $ Growth SoC Shipping Q’ty 1.38 Bn, NT$ 38.4% YoY 25.0% YoY 2
Slide 11: 2025 Q1 Revenue Analysis by Business Model
2025 Q1 Revenue Analysis by Business Model 2025Q1 Confidential Subject to change without notice copyright © 2025-2030 Andes Technology Taking Mainstream 10
Slide 14: 2021 to 2024 Revenue Analysis by Application
2021 to 2024 Revenue Analysis by Application (NTD ’000) Confidential Subject to change without notice copyright © 2025-2030 Andes Technology Taking Mainstream 13
Slide 15: Historical License Revenue Analysis
Historical License Revenue Analysis (NTD ’000) License Revenue Confidential Subject to change without notice copyright © 2025-2030 Andes Technology Taking Mainstream 14
Slide 16: Historical Royalty Revenue Analysis
Historical Royalty Revenue Analysis (NTD ’000) Royalty Revenue Confidential Subject to change without notice copyright © 2025-2030 Andes Technology Taking Mainstream 15
Slide 17: 2025 Q1 Expense Analysis
2025 Q1 Expense Analysis YoY QoQ +7.0% +3.6 % YoY +7.0 % (NTD ’000) (NTD ’000) Confidential Subject to change without notice copyright © 2025-2030 Andes Technology Taking Mainstream 16
Slide 20: The Key Applications & The Trend
The Key Applications & The Trend The global Internet of Thi The market size in the ngs (IoT) market size is pr Artificial Intelligence m ojected to grow from $71 arket is projected to re 4.48 billion in 2024 to $4, ach US$305.90bn in 20 062.34 billion by 2032, at 24. a CAGR of 24.3%... Read The mark
Slide 21: Fast Growing Automotive MCU Markets
Fast Growing Automotive MCU Markets ◼ Semiconductor devices in vehicle are growing fast! ◼ Global automobile MCU market size in 2024 will reach USD$10.48B, and $16B at 2029, CAGR 8.92% https://www.mordorintelligence.com/industry-reports/global-automo tive-mcu-market ◼ The total number of MCUs will r
Slide 22: Safety Mechanisms Andes FuSA cores Implemented
Safety Mechanisms Andes FuSA cores Implemented Mission Critical Low Power & Security Common Safety Features • Advanced ECC • Address Decoder D45-SE D23-SE N25F-SE 8-stage 3-stage 5-stage • White Noise Protection Single-issue Dual-issue Single-issue • Error Status Indication • Core Trap Status Bus In
Slide 23: CMOS Image Sensor Chip (ASIL-B)
CMOS Image Sensor Chip (ASIL-B) ◼ MetaSilicon MAT series CMOS image sensor chips use the AndesCore N25F -SE processor to achieve a high level of safety and reliability. ◼ SOC includes LOFIC (Lateral Overflow Integration Capacitor) + DCG (Dual C onversion Gain) HDR (High-Dynamic Range), dual-row ADC,
Slide 24: Touch and Display Driver Integration (TDDI) SoC
Touch and Display Driver Integration (TDDI) SoC ◼ ILITEK’s ILI6600A supports up to 3 chips cascading and provides the number of colors up to 16.7M. Its IIE (Impressive Image Enhancement) function can ac hieve high-quality display and visual experience. ◼ The ILI6600A uses the ISO 26262 functional sa
Slide 25: MTIA: Meta Training/Inference Accelerator
MTIA: Meta Training/Inference Accelerator ◼ ISCA 2023 paper, “MTIA: First Generation Silicon Targeting Meta’s Recommendation Systems” ◼ Proc-A/B: AX25-V100, an early version of the popular NX27V ◼ Custom extensions: for new interfaces, instructions and registers ◼ Performs quite well on low and medi
Slide 26: Edge AI With Computing In-Memory
Edge AI With Computing In-Memory Rain AI: Leveraging Andes Custom Extensions ACE Streaming Port xN ◼ In-memory Compute Integration … ⚫ Introduce 2nd vector load/store unit; direct access to VRF In-memory AX45MPV ⚫ Leverage custom addressing and address control Compute registers to control a pluralit
Slide 27: Edge AI With Computing In-Memory
Edge AI With Computing In-Memory ◼ Axelera Metis SoC Targeting Computer Vision applications ◼ 4 powerful PE’s, each with digital In-Memory Computing (D-IMC) ◼ RISC-V processors for both PE control as well as system control under Linux Powerful 4MB L1 4MB L1 Competitive 214 TOPS/chip , best in class
Slide 28: Edge AI With Analog Computing In-Memory
Edge AI With Analog Computing In-Memory ◼ TetraMem Analog Computing-In-Memory MX200 (RRAM-based) ◼ 8-bit 256x256 (64K) MAC Engines, >30 TOPS/W performance ◼ ML core operators (conv, gemm) processed in NPU ◼ Remaining operations processed in RISC-V Vector processors and control CPU AXI Bus "Thousands
Slide 29: Endpoint AI
Endpoint AI ◼ Renesas R9A06G150 Voice-Control ASSP ◼With 100MHz DSP-capable D25F processor ◼ML-based voice recognition gets >50% speedup by using P-extension ◼ Spacetouch SPV60 Intelligent audio processor ⚫ High performance for customer development ◆ 100 GOPS NPU for noise reduction, echo cancellati
Slide 31: Andes RISC-V CPU Cores
Andes RISC-V CPU Cores AX60 Series AX63 AX65 AX66/AX67 AX6X-SE A72~A78; 13-stage OOO Linux MP N1/V1/X1 Categories Power-efficient Mid-range Extended FUSA 45 Series AX45MPV, AX46MPV A53/55, R52/ N45, NX45 D45 D45-SE 8-stage Superscalar A45(MP), AX45(MP) R82, M7 27 Series NX27V A27(L2), AX27(L2) A5/7/
Slide 32: RISC-V Continues to Rapidly
RISC-V Continues to Rapidly ⚫ RISE: RISC-V Software Ecosystem, a project under LF Europe ⚫ To accelerate the development of RISC-V open source SW ⚫ Led by industry leaders ⚫ Areas to focus over time: ⚫ Compilers & Toolchains ⚫ Language Runtimes ⚫ System Libraries ⚫ Debug & Profiling Tools ⚫ Simulato
Slide 33: Andes Automotive Ecosystem
Andes Automotive Ecosystem Security/HSM AUTOSAR Securyzr AUTOSAR RT64x eHSM HSM HSM Capital VSTAR Nucleus SafetyCert VOSySmonitoRV TEE MaaZ AUTOSAR PUF/HSM Compiler/Debugger/Tool Safety RTOS & STL EWRISCV TRACE32 Debugger MULTI IDE / Compiler SAFERTOS Microsoft Azure RTOS Compiler LDRA Tool Suite RT
Slide 34: Andes Custom Extension (ACE)
Andes RISC-V Processors to Fit Your AI Data center >100 TOPS Automotive Mobile AR/VR >10 TOPS Surveillance • ADAS, HDR Andes Custom Extension (ACE) • > 10 cameras >1 TOPS Smart Home • Face unlock • Bokeh Andes V-Series Avatar RV64GCPV >1 GOPS Smart Camera • • Gesture recognition • Intelligent HMI •
Slide 35: AndesAIRE : Andes AI Runs Everywhere
AndesAIRE : Andes AI Runs Everywhere NN models AndeSight IDE AndesAIRE NN SDK AI Compilers • GCC/LLVM Toolchains • AndeSoft Vector/DSP Library AndesAIRE NNPilot • Build, debug, deploy, profile • Graph-level optimization (Pruning / Quantization) • Analysis and tuning • Backend-aware optimization (Fus
Slide 36: Andes Partners and RISC-V Ecosystem
Andes Partners and RISC-V Ecosystem Category Partners IP SW and Dev Env. Design Service, Foundries, EDA and others Confidential Subject to change without notice copyright © 2025-2030 Andes Technology Taking Mainstream 35
Slide 37: Thank You
* a3 Thank You a NDES 7] [fs i op . « 4 tl i a Wi tetettatia tt iisdne RO CLARET NT ] 36

Andes Technology — Andes Technology Corp. Investors Conference (April 2025) on 6ix

Andes Technology — Andes Technology Corp. Investors Conference (April 2025)

Slide 1: Andes Technology Corp. Investors Conference

Slide 2: Safe Harbor Notice

Slide 3: Report Topics

Slide 4: Andes Company Introduction

Slide 5: Andes Technology Corporation

Slide 6: The Financial & Operation Status

Slide 7: Andes Revenue for the last 12 months

Slide 8: 2025 Q1 Revenue Analysis

Slide 9: 2025 Q1 License Analysis

Slide 10: 2025 Q1 Royalty Analysis

Slide 11: 2025 Q1 Revenue Analysis by Business Model

Slide 12: 2025 Q1 Revenue Analysis by Region

Slide 13: 2025 Q1 Revenue Analysis by Application

Slide 14: 2021 to 2024 Revenue Analysis by Application

Slide 15: Historical License Revenue Analysis

Slide 16: Historical Royalty Revenue Analysis

Slide 17: 2025 Q1 Expense Analysis

Slide 18: EPS Analysis

Slide 19: Andes Target Major Applications

Slide 20: The Key Applications & The Trend

Slide 21: Fast Growing Automotive MCU Markets

Slide 22: Safety Mechanisms Andes FuSA cores Implemented

Slide 23: CMOS Image Sensor Chip (ASIL-B)

Slide 24: Touch and Display Driver Integration (TDDI) SoC

Slide 25: MTIA: Meta Training/Inference Accelerator

Slide 26: Edge AI With Computing In-Memory

Slide 27: Edge AI With Computing In-Memory

Slide 28: Edge AI With Analog Computing In-Memory

Slide 29: Endpoint AI

Slide 30: The R&D Power for The Future

Slide 31: Andes RISC-V CPU Cores

Slide 32: RISC-V Continues to Rapidly

Slide 33: Andes Automotive Ecosystem

Slide 34: Andes Custom Extension (ACE)

Slide 35: AndesAIRE : Andes AI Runs Everywhere

Slide 36: Andes Partners and RISC-V Ecosystem

Slide 37: Thank You