Andes Technology Corp. · TWSE:6533
Andes Technology — Investor Conference September 2024
30 slides from Andes Technology's conference presentation, September 2024
Slide 1: Andes Technology Corp. Investor Conference
Andes Technology Corp. Investor Conference Ted Chang Spokesperson Sep, 2024
Slide 2: Safe Harbor Notice
Safe Harbor Notice Except for the historical information contained herein, the matters addressed in this presentation are forward-looking statements that involve certain risks and uncertainties that could cause actual results to differ materially, including but not limited to weather, impact of comp
Slide 3: Report Topics
Report Topics Andes Company Introduction The Financial & Operation Status The Key Applications & The Trend The R&D Power for The Future 3
Slide 4: Andes Company Introduction
Andes Company Introduction Andes Highlights • Founded in March 2005 in Hsinchu Science Park, Taiwan, ROC. • Well-established high technology IPO company • Over 500 people; 80% are engineers. • TSMC OIP Award “Partner of the Year” for New IP (2015) • Founding Premier membership in the RISC-V Internat
Slide 5: Andes Technology Corporation
Andes Technology Corporation Quick Facts on Andes 19 Years, Since 2005 500+ 400+ Customers 14Bn+ SoC Pureplay CPU vendor Employee , > 80% R&D Licensing AndesCore™ Total Customer Shipment 2023 Operation Result Revenue $ Growth License $ Growth Royalty $ Growth SoC Shipping Q’ty 1.05 Bn, NT$ 18.3% YoY
Slide 6: The Financial & Operation Status
The Financial & Operation Status 6
Slide 7: 2Q24 Revenue Analysis
2Q24 Revenue Analysis YoY QoQ YoY +55.4 % +30.6 % +21.6 % (NTD ’000) (NTD ’000) Taking RISC-V® Mainstream 7
Slide 8: 2024 Q1-Q2 Revenue Analysis by Business Model
2024 Q1-Q2 Revenue Analysis by Business Model Taking RISC-V® Mainstream 8
Slide 9: 2024 Q1-Q2 Revenue Analysis by Region
2024 Q1-Q2 Revenue Analysis by Region Taking RISC-V® Mainstream 9
Slide 10: 2021 to 2023 Revenue Analysis by Application
2021 to 2023 Revenue Analysis by Application (NTD ’000) Taking RISC-V® Mainstream 10
Slide 11: 2024 Q1-Q2 Revenue Analysis by Application
2024 Q1-Q2 Revenue Analysis by Application Taking RISC-V® Mainstream 11
Slide 12: 2024 Q1/Q2 Expense Analysis
2024 Q1/Q2 Expense Analysis YoY QoQ +33.2 % +4.5 % (NTD ’000) Taking RISC-V® Mainstream 12
Slide 13: 24H1 Expense Analysis
24H1 Expense Analysis YoY +39.9% (NTD ’000) Taking RISC-V® Mainstream 13
Slide 14: 2024 Q2 EPS Analysis
2024 Q2 EPS Analysis YoY QoQ $-0.71 $ -0.54 (NTD) Taking RISC-V® Mainstream 14
Slide 15: 24H1 EPS Analysis
24H1 EPS Analysis YoY $ -0.63 (NTD ) Taking RISC-V® Mainstream 15
Slide 16: The Key Applications & The Trend
The Key Applications & The Trend 16
Slide 17: The Key Applications & The Trend
The Key Applications & The Trend The global Internet of The market size in the Things (IoT) market size is Artificial Intelligence projected to grow from market is projected to $714.48 billion in 2024 to reach US$305.90bn in $4,062.34 billion by 2032, 2024. at a CAGR of 24.3%... The market size is R
Slide 18: Safety Mechanisms Andes FuSA cores Implemented
Safety Mechanisms Andes FuSA cores Implemented Mission Critical Low Power & Security Common Safety Features • Advanced ECC • Address Decoder D45-SE D23-SE N25F-SE 8-stage 3-stage 5-stage • White Noise Protection Single-issue Dual-issue Single-issue • Error Status Indication • Core Trap Status Bus In
Slide 19: Andes Automotive Ecosystem
Andes Automotive Ecosystem Security/HSM AUTOSAR Securyzr™ AUTOSAR RT64x eHSM HSM HSM Capital VSTAR Nucleus SafetyCert VOSySmonitoRV TEE MaaZ AUTOSAR PUF/HSM Compiler/Debugger/Tool Safety RTOS & STL EWRISCV TRACE32 Debugger MULTI IDE / Compiler SAFERTOS Microsoft Azure RTOS Compiler LDRA Tool Suite R
Slide 20: RISC-V for Datacenter & Cloud
RISC-V for Datacenter & Cloud RISC-V offers unique Custom computing for AI Achieve your performance Opportunity for and and accelerators other emerging workloads power targets RISC-V CPU core market will grow 115% CAGR, capturing > 14% of all CPU cores by 2025 20
Slide 21: AnDLA I-Series
Andes RISC-V Processors to Fit Your AI Data center >100 TOPS Automotive Mobile AR/VR >10 TOPS Surveillance • ADAS, HDR • > 10 cameras >1 TOPS Smart Home • Face unlock • Bokeh Andes V-Series Avatar >1 GOPS Smart Camera • (RV64GCPV) • Gesture recognition • Intelligent HMI • SLAM AnDLA™ I-Series • Barg
Slide 22: MTIA: Meta Training/Inference Accelerator
MTIA: Meta Training/Inference Accelerator ISCA 2023 paper, “MTIA: First Generation Silicon Targeting Meta’s Recommendation Systems” Proc-A/B: AX25-V100, an early version of the popular NX27V Custom extensions: for new interfaces, instructions and registers Performs quite well on low and medi
Slide 23: Edge AI With Analog In-Memory Computing
Edge AI With Analog In-Memory Computing TetraMem Analog In-Memory-Computing MX200 (RRAM-based) 8-bit 256x256 (64K) MAC Engines, >30 TOPS/W performance ML core operators (conv, gemm) processed in NPU Remaining operations processed in RISC-V Vector processors and control CPU AXI Bus "Thousands
Slide 24: Endpoint AI
Endpoint AI Renesas R9A06G150 Voice-Control ASSP With 100MHz DSP-capable D25F processor ML-based voice recognition gets >50% speedup by using P-extension Spacetouch SPV60 Intelligent audio processor High performance for customer development 100 GOPS NPU for noise reduction, echo cancellati
Slide 25: AndesAIRE: Andes AI Runs Everywhere
AndesAIRE™: Andes AI Runs Everywhere HW/SW Solutions for AI from the Edge to the Cloud NN models AndesAIRE™ NN SDK AndeSight™ IDE AndesAIRE™ NNPilot™ • GCC/LLVM Toolchains Pruning, Quantization, Optimization, Evaluation • Build, debug, profile Generated C code template Generated NN models • Analys
Slide 26: The R&D Power for The Future
The R&D Power for The Future 26
Slide 27: Andes RISC-V CPU Cores
Andes RISC-V CPU Cores AX60 Series AX63 AX65 AX66/AX67 AX6X-SE A72~A78; 13-stage OOO Linux MP N1/V1/X1 Categories Power-efficient Mid-range Extended FUSA 45 Series AX45MPV, AX46MPV A53/55, R52/ N45, NX45 D45 D45-SE 8-stage Superscalar A45(MP), AX45(MP) R82, M7 27 Series NX27V A27(L2), AX27(L2) A5/7/
Slide 28: RISC-V Continues to Rapidly
RISC-V Continues to Rapidly RISE: RISC-V Software Ecosystem, a project under LF Europe To accelerate the development of RISC-V open source SW Led by industry leaders Areas to focus over time: Compilers & Toolchains Language Runtimes System Libraries Debug & Profiling Tools Simulato
Slide 29: Andes Partners and RISC-V Ecosystem
Andes Partners and RISC-V Ecosystem Category Partners IP SW and Dev Env. Design Service, Foundries, EDA and others 29
Slide 30: Thank you
Thank you
Andes Technology — Investor Conference September 2024 on 6ix