Business
AMD Announces Production Ramp of Next-Generation AMD EPYC Processor “Venice” on TSMC 2nm Process Technology
News Summary: AMD has begun production ramp of its 6th Gen AMD EPYC™ CPUs, codenamed “Venice,” marking a major milestone for the AMD and TSMC collaboration on 2nm technology“Venice” is the first HPC product in the industry to achieve production ramp on TSMC advanced 2nm technologyCritical milestone achieved as agentic AI workloads drive demand for accelerated AI infrastructure deploymentsAMD continues to drive 2nm product expansion with “Verano” a follow on to “Venice” with industry leading inte
About this update from Advanced Micro Devices Inc
[{"type":"image","alt":"Advanced Micro Devices, Inc.","displaySize":"","headline":null,"caption":"Advanced Micro Devices, Inc.","className":"","disableSlideshowImg":false,"size":{"original":{"width":300,"height":115,"url":"https://media.zenfs.com/en/globenewswire.com/e9e10df32ba7394934d5302147b47564"},"resized":{"url":"https://s.yimg.com/ny/api/res/1.2/F0pDkbzPNz3P_3lXoOpJCw--/YXBwaWQ9aGlnaGxhbmRlcjt3PTQyMDtoPTE2MQ--/https://media.zenfs.com/en/globenewswire.com/e9e10df32ba7394934d5302147b47564","width":300,"height":115},"resize_sm":{"url":"https://s.yimg.com/ny/api/res/1.2/F0pDkbzPNz3P_3lXoOpJCw--/YXBwaWQ9aGlnaGxhbmRlcjt3PTQyMDtoPTE2MQ--/https://media.zenfs.com/en/globenewswire.com/e9e10df32ba7394934d5302147b47564","width":300,"height":115}},"lazy":false},{"type":"text","content":"News Summary:","length":13,"tagName":"p"},{"type":"list","items":[{"val":[{"type":"text","content":"AMD has begun production ramp of its 6th Gen AMD EPYC™ CPUs, codenamed “Venice,” marking a major milestone for the AMD and TSMC collaboration on 2nm technology","length":159,"tagName":"p"}]},{"val":[{"type":"text","content":"“Venice” is the first HPC product in the industry to achieve production ramp on TSMC advanced 2nm technology","length":108,"tagName":"p"}]},{"val":[{"type":"text","content":"Critical milestone achieved as agentic AI workloads drive demand for accelerated AI infrastructure deployments","length":110,"tagName":"p"}]},{"val":[{"type":"text","content":"AMD continues to drive 2nm product expansion with “Verano” a follow on to “Venice” with industry leading integration of LPDDR for growing memory demand in agentic AI workloads","length":175,"tagName":"p"}]}],"tagName":"ul","bulletedList":true,"length":552,"olType":false},{"type":"text","content":"SANTA CLARA, Calif., May 21, 2026 (GLOBE NEWSWIRE) -- AMD (NASDAQ: AMD) today announced that its next-generation AMD EPYC™ processor, codenamed “Venice,” is ramping production in Taiwan on TSMC’s advanced 2nm process technology, with future plans to ramp production at TSMC’s Arizona fabrication facility. The milestone in the execution of the AMD data center CPU roadmap demonstrates continued progress toward delivering the leadership performance and energy efficiency required for next-generation cloud, enterprise and AI infrastructure. “Venice” is the first high-performance computing (HPC) product in the industry to ente...