Aehr Test Systems · NASDAQ:AEHR

Aehr Test Systems — Investor Presentation (June 2025)

33 slides from Aehr Test Systems's investor presentation, Jun 3, 2025

  1. Slide 1: Setting the Test Standard for Tomorrow

    Setting the Test Standard for Tomorrow June 2025 Nasdaq: AEHR Aehr Test Confidential

  2. Slide 2: Forward Looking Statements

    Forward Looking Statements This presentation contains forward-looking statements that involve risks and uncertainties relating to projections regarding industry growth and customer demand for the Company’s products. Actual results may vary from projected results. These risks and uncertainties includ

  3. Slide 3: Presenting Today

    Presenting Today Gayn Erickson CEO, Aehr Test Systems 3

  4. Slide 4: Aehr Test Systems Company Overview

    Aehr Test Systems Company Overview Semiconductor Test & Burn-in for over 45 Years! ⚫ World-wide leader in wafer-level test and burn-in systems XP ⚫ Unique full-wafer test and burn-in High Power systems and contactors High Power Multi-Wafer Test & Burn-In System Test & Burn-In System ⚫ Technology lea

  5. Slide 5: Burn-in Testing – The Bathtub Curve

    Burn-in Testing – The Bathtub Curve Production Reliability Screening / Qualification / Burn-in Burn-in ⚫ Production Burn-in: } semiconductor components are } subjected to elevated voltages and temperatures for a duration of Decreasing Failure Rate Constant Failure Rate Increasing Failure Rate time (

  6. Slide 6: Worldwide Customer Base

    Worldwide Customer Base Aehr Test Headquarters, Fremont California Aehr has been a leader in burn-in test solutions for over 45 years with thousands of systems shipped worldwide (Partial Customer List) 6

  7. Slide 7: Proprietary Wafer Level Enabling Technology

    Proprietary Wafer Level Enabling Technology ⚫ Aehr’s FOX-XP is capable of both functional burn-in and test solutions – leverages proprietary aligner and contactor technology ⚫ Multi-wafer technology enables customers to achieve an overall decrease in test equipment cost and fab footprint – while inc

  8. Slide 8: Aehr Wafer Level Test & Burn-in Patents

    Aehr Wafer Level Test & Burn-in Patents ⚫ WaferPak temperature control methods ⚫ Vacuum & pressure-based WaferPaks ⚫ Maintaining probe contact over temperature ⚫ Electrical components in WaferPak ⚫ Individual DUT power supplies ⚫ Per Die Current Protection ⚫ Redundant power supplies ⚫ Portable Wafer

  9. Slide 9: Sonoma High Power Reliability Test of AI xPUs

    Sonoma High Power Reliability Test of AI xPUs ⚫ High-power test & burn-in for production, reliability qualification, and life-time tests ⚫ Up to 88 processors with independent test resources and high-power liquid cooling per device ⚫ Qualification and Production configurations ⚫ Shipping in volume w

  10. Slide 10: Aehr Test Systems Market Drivers

    Aehr Test Systems Market Drivers Need for cost-efficient wafer level, singulated die, and packaged part burn-in, stabilization, & testing is creating significant revenue opportunities for Aehr Test in the following key markets ⚫ Artificial Intelligence Processors and Processing Infrastructure drivin

  11. Slide 11: Aehr Market Growth Drivers

    Aehr Market Growth Drivers 11

  12. Slide 12: Aehr Test Systems Market Growth Drivers

    Aehr Test Systems Market Growth Drivers ⚫ Reliability test needs to grow with or ahead of the market as o Semiconductors are getting less reliable ✓ Larger die size and therefore more likely to have defects ✓ Smaller geometries ✓ More compound semis (SiC and GaN for power, and optical for communicat

  13. Slide 13: AI Processor Cluster Reliability is Critical

    AI Processor Cluster Reliability is Critical ⚫ Impact on Training: AI workloads, especially for training large language models, often utilize massive processor clusters. Failures in these clusters can have a cascading effect, impacting the entire training process, leading to training interruptions,

  14. Slide 14: Key Trends Driving Wafer Level Burn-in

    Key Trends Driving Wafer Level Burn-in Decreasing Increasing Increasing Semiconductor Reliability Reliability Needs Known Good Die ⚫ Smaller Geometries ⚫ Artificial Intelligence ⚫ Heterogeneous Integration Processing / Processors (Extends Moore’s Law) ⚫ Larger Die Sizes ⚫ Electric Vehicles ⚫ Multi-D

  15. Slide 15: Multi-Die Packages Drive Wafer Level Test & Burn-in

    Multi-Die Packages Drive Wafer Level Test & Burn-in Onsemi EV Traction Inverters (24-die module for Power) Intel Co-Packaged Optics Demo at OFC 2024 Toshiba Micron NVIDIA 16-die NAND flash memory HBM3E 8 Die DRAM Stack Blackwell AI MCM announced at GTC 2024 for Enterprise Data Storage for AI and Sup

  16. Slide 16: Key Trends Driving Package Part Burn-in

    Key Trends Driving Package Part Burn-in Decreasing Increasing Increasing Power and Semiconductor Reliability Reliability Needs Complex Packages ⚫ Smaller Geometries ⚫ Artificial Intelligence ⚫ Multi-Die COWOS Processing / Processors Packaging ⚫ Larger Die Sizes ⚫ Electric Vehicles ⚫ Integration of m

  17. Slide 17: Relative Size of Targeted Semiconductor Device Markets

    Relative Size of Targeted Semiconductor Device Markets These are relative annual revenues of these semiconductor devices. Historically, annual capital spend on test ranges from 2% to 5% of the device annual revenue. Wafer Le vel Production Win Pac kage P art Production Win Wafer Le vel Production Ta

  18. Slide 18: Relative Size of Targeted Semiconductor Device Markets

    Relative Size of Targeted Semiconductor Device Markets These are relative annual revenues of these semiconductor devices. Historically, annual capital spend on test ranges from 2% to 5% of the device annual revenue. Wafer Le vel Production Win Pac kage P art Production Win Wafer Le vel Production Ta

  19. Slide 19: Optical I/O is Coming…

    Optical I/O is Coming… ⚫ “TSMC silicon photonics tech first co-package optics (CPO) samples ready for NVIDIA, Broadcom in 2025” – Tweaktown, December 2024 ⚫ Ayar Labs CEO: Optical Chiplets Coming to SOCs Soon – HPCwire, Oct 2024 ⚫ “Intel’s 4 TB/s Integrated Optical I/O Chiplet Called ‘Important Mile

  20. Slide 20: Relative Size of Targeted Semiconductor Device Markets

    Relative Size of Targeted Semiconductor Device Markets These are relative annual revenues of these semiconductor devices. Historically, annual capital spend on test ranges from 2% to 5% of the device annual revenue. Wafer Le vel Production Win Pac kage P art Production Win Wafer Le vel Production Ta

  21. Slide 21: SiC and Multi-Die Packages / Modules

    SiC and Multi-Die Packages / Modules Package/Module yield loss cost much greater than cost of wafer level burn-in Tesla Traction Inverter with 24 2-die modules Lucid Traction Inverter with 3 10-die modules Onsemi Traction Inverter with 1 24-die module Onsemi Traction Inverter with 3 8-die modules 21

  22. Slide 22: SiC and Multi-Die Packages / Modules Module Yield

    SiC and Multi-Die Packages / Modules Module Yield as Function of Burn-in Yield Loss per Die 100% 95% 90% 0.25% 85% 0.50% Module Yield 80% 75% 0.75% 70% 1.00% 65% 60% 1.25% 55% 50% 1.50% 0 4 8 12 16 20 24 28 32 Number of Die per Module ⚫ Infant Mortality Yield loss of Modules linear with yield loss p

  23. Slide 23: Relative Size of Targeted Semiconductor Device Markets

    Relative Size of Targeted Semiconductor Device Markets These are relative annual revenues of these semiconductor devices. Historically, annual capital spend on test ranges from 2% to 5% of the device annual revenue. Wafer Le vel Production Win Pac kage P art Production Win Wafer Le vel Production Ta

  24. Slide 24: GaN Power Semiconductor WLTBI Win

    GaN Power Semiconductor WLTBI Win ⚫ Closed first gallium nitride (GaN) semiconductor order for production wafer level test and burn in system. ⚫ Customer is a leading automotive semiconductor supplier and a key player in the gallium nitride power semiconductor market. ⚫ Expands Aehr production wafer

  25. Slide 25: Relative Size of Targeted Semiconductor Device Markets

    Relative Size of Targeted Semiconductor Device Markets These are relative annual revenues of these semiconductor devices. Historically, annual capital spend on test ranges from 2% to 5% of the device annual revenue. Wafer Le vel Production Win Pac kage P art Production Win Wafer Le vel Production Ta

  26. Slide 26: Flash Memory WLTBI Opportunity

    Flash Memory WLTBI Opportunity ⚫ Aehr has been engaged with multiple Flash memory companies related to our FOX wafer level test and burn in systems for their high-volume production ⚫ Aehr has secured a commitment from one of the major Flash memory suppliers to evaluate the FOX-XP system with our pro

  27. Slide 27: Aehr Proprietary MEMs Fine Pitch Full Wafer Contactor

    Aehr Proprietary MEMs Fine Pitch Full Wafer Contactor 27

  28. Slide 28: Relative Size of Targeted Semiconductor Device Markets

    Relative Size of Targeted Semiconductor Device Markets These are relative annual revenues of these semiconductor devices. Historically, annual capital spend on test ranges from 2% to 5% of the device annual revenue. Wafer Le vel Production Win Pac kage P art Production Win Wafer Le vel Production Ta

  29. Slide 29: AI Accelerator Example of Multi-Chip Packaging

    AI Accelerator Example of Multi-Chip Packaging AMD Instinct MI325X Accelerator ⚫ Multiple Compute Chiplets ⚫ 8 12-Die HBM3 DRAM Stacks ⚫ Single OAM Substrate ⚫ Roadmap for new Chiplet Architecture Accelerators each year from 2023 to 2026 ⚫ 8 MI325X Cluster: 29

  30. Slide 30: Higher Reliability Needed in AI Processing?

    Higher Reliability Needed in AI Processing? Meta article from July 2024: The Llama 3 Herd Models: https://a i.meta.co m/resear ch/pub lications/th e-llama-3-her d-of-models/ 30

  31. Slide 31: AI Accelerator/Processor WLTBI Win

    AI Accelerator/Processor WLTBI Win ⚫ Aehr worked with and successfully captured the first production orders (> $10 million in initial order) from an AI Accelerator company to move their AI processor system level test and burn-in to wafer level on the Aehr FOX-XP system ⚫ Our proprietary WaferPaks an

  32. Slide 32: Testing without Compromise

    Testing without Compromise Reliability, Stress, and DFT Testing without compromise ⚫ Solutions for package parts, modules, panels, or wafers allow testing at optimal process point ⚫ Confirm which devices received desired test with per device measurements, monitoring, & feedback ⚫ 100% traceability w

  33. Slide 33: Setting the Test Standard for Tomorrow

    Setting the Test Standard for Tomorrow June 2025 Nasdaq: AEHR Aehr Test Confidential

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