Enablence Technologies Inc. · TSXV:ENA
Enablence Technologies — Photonics West 2024, SPIE OPTO
16 slides from Enablence Technologies's conference presentation, Jan 30, 2024
Slide 1: Systems-on-chip in monolithically integrated silica-on-silicon platform
Systems-on-chip in monolithically integrated silica-on-silicon platform Serge Bidnyk, Ksenia Yadav, Ashok Balakrishnan Enablence Technologies Inc. Photonics West 2024, SPIE OPTO January 30, 2024 Room 304 • 11:35 AM – 11:55 AM
Slide 2: Introduction: PLC Technology
Introduction PLC Technology • Integrated photonics has emerged as a key technology to enable advancements in optical computing, high-speed communication, and advanced vision systems. • Photonic integrated circuits possess high optical performance and are well suited for both monolithic and hybrid in
Slide 3: Introduction: Silica-on-silicon PLC platform
Introduction Silica-on-silicon PLC platform • A versatile and low-cost platform with powerful characteristics. • Widespread applications, including high-speed communication, medical imaging, autonomous driving, environmental sensing, and optical computing. 3
Slide 4: Our PLC Platform
Our PLC Platform Silica-on-silicon • Buried silica-based waveguides with a Δn = 2.0% Δn = 2.0% refractive index contrast and typical waveguide dimensions of 3 ⨉ 3 μm. SiO2 • Fabricated using atmospheric pressure core chemical-vapor deposition (APCVD) and SiO2 reactive ion etching. cladding • We offe
Slide 5: Maximum power and non-linearities
Maximum power and non-linearities Two-photon absorption Optical non-linear effects in SiN Output power >1W PLC 100 mW SiPh 100 mW Input power In silicon photonics, two-photon absorption limits Non-linear effects in SiN waveguides enable a wide the amount of optical power that can be guided range of
Slide 6: Backbone for optical computing
Backbone for optical computing small intensity modulation 100 mW 100 mW 100 mW 100 mW 100 mW 100 mW on-peak 1W 100 mW 100 mW AWG passband 100 mW off-peak 100 mW PD1 … PD10 Direct measurement of individual LD power PDλ Inferred wavelength detuning of individual LDs 6
Slide 7: Ultra-dense architectures
Ultra-dense architectures 8-channel LAN-WDM multiplexer • Total device footprint: 0.38 cm2 • On-chip loss estimated at 0.3 - 0.5 dB • 1 dB bandwidth of 3.5 nm (80% of the channel pitch) • Polarization-independent operation across the O-band (polarization dependent loss < 0.2 dB) 1 2 3 4 6 7 8 9 7
Slide 8: Machine-driven design
Machine-driven design Progressive abstraction of complexity STEP 1: Simplified functional view I0 WG0 WG0 F10 WG0 L1,L4 WG0 L1,L4 F30 WG0 L1 WG6 L0 WG6 L0 WG1 L4 WG0 L1 WG0 L1 I1 WG2 L0-L7 F0 WG2 WG2 L3,L6F2 WG2L2,L5 F31 WG2 L2 WG3 L5 WG1 L4 WG2 L2 WG2 L2 WG4 L3 I2 WG4 WG4 F11 WG4 L2,L5 WG4L3,L6 F32
Slide 9: ML-driven design
ML-driven design Building custom models Leveraging ML technologies: • Adopt Keras API for arbitrary advanced workflows • Build on top of TensorFlow 2 • Deploy on AWS 9
Slide 10: Advanced vision
Advanced vision Optical processing COHERENT FEATURE EXTRACTION f1 f2 f3 f4 f5 PDs … spatial distance 3D imaging velocity vector OPTICAL PROCESSING tissue density spectral analysis layer metrology surface texture DSP molecular detection antibody bindings Aφ λ P LD art conservation medical diagnostics
Slide 11: PLCs in Production
PLCs in Production Challenges in high volumes • To achieve high-performing devices, we rely on advanced data analysis that is tightly coupled to our design and fabrication. • We use machine learning (ML) algorithms to scale the capabilities of the silica-on-silicon PLC platform to high-volume manufa
Slide 12: Design optimizations
Design optimizations The challenge of process uniformity • Process uniformity and consistency is critical in the manufacturing of photonic chips. • Traditionally, standard statistical methods are used to compensate for systematic process non-uniformities: systematic index variation 12
Slide 13: Design Optimizations: Adjustments of design parameters through ML
Design Optimizations Adjustments of design parameters through ML TRAINING SET INPUT x(i) LABEL d(i) ◼︎ ✿ ⬤ ⏣ ✦ ✚ ⌘ ★ ⌽ ► ▲ ♠ ❖ ⌾ ◀︎ ⚑ ♣ ♦ MODEL TRAINING simulated spectrum design parameters VALIDATION SET MODEL VALIDATION 13
Slide 14: Design Optimizations: Adjustments of design parameters through ML
Design Optimizations Adjustments of design parameters through ML • To validate the approach, we applied it to a production mask with 600 devices: • We used the model predictions to insert corrections into each of the chips on the mask, thereby producing a ML-enhanced version of the production mask.
Slide 15: Conclusions
Conclusions • We described how silica-on-silicon platform is ideally suited for creating systems-on- chip for applications in optical computing and advanced vision. • We demonstrate how the use of AI/ML revolutionized the way photonic integrated circuits are designed and fabricated in a high-volume
Slide 16: Custom Optical Design
Custom Optical Design We have built systems-on-a-chip for avionics, medical robotics, ‘automotive LIDAR, 3D mapping, and optical sensing. We can do ‘commercial-grade prototyping or high-volume production of chips. Our ‘mechanical design engineers can also assist with fiber pigtailing and packaging.
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