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Intel — Intel Developer Forum Fall 2001

23 slides from Intel's conference presentation, Aug 29, 2001

  1. Slide 1: Optimizing Mobile Power Delivery

    Intel Developer Optimizing Forum Fall 2001 Mobile Power Delivery Don J Nguyen Mobile Power Architect Technology Research Lab Intel Corporation August 29, 2001 Intel Page 1 Copyright © 2001 Intel Corporation. Labs

  2. Slide 2: Agenda

    Intel Developer Agenda Forum Fall 2001 ‰ Overview ‰ Mobile Power System Review ‰ Optimizing Power Conversion Efficiency ¾Detailed View of Power Loss ¾VR Design w/ System Power Indicator ‰ Optimizing Battery Loading Characteristic ‰ Display Power Reduction ‰ Summary and Call to Action Intel Page 2 Co

  3. Slide 3: Advancing The Mobile PC Platform

    Advancing The Mobile PC Intel Developer Forum Platform Fall 2001 ‰ Key attributes: ¾ Great performance ¾ Smaller and lighter weight ¾ Batteries charge lasts all day ¾ Ubiquitous wireless connectivity ‰ Enables new usage models and new form factors ¾ Anywhere, anytime mobile computing ¾ Tablet PC Int

  4. Slide 4: Mobile PC Platform Challenges

    Intel Developer Mobile PC Platform Challenges Forum Fall 2001 Rest of Platform ‰ Platform power 13% CPU reduction is the greatest Cooling Fan 7% Chipset challenge 4% 13% ‰ Idle power is about 85% Power Supply of average power Loss 7% ‰ CPU and chipset are well power managed HDD/DVD 9% when idle ‰ Ma

  5. Slide 5: Platform Power Reduction

    Intel Developer Platform Power Reduction Forum Fall 2001 ‰ Goal: 30% reduction in typical mobile PC platform power through optimizations of: ¾Hardware subsystems ¾Software (OS and drivers) ¾Firmware ‰ Research results to be incorporated into future mobile reference platform and provided to all OEMs,

  6. Slide 6: Mobile Power System Review

    Intel Optimizing Mobile Power Delivery Developer Forum Mobile Power System Review Fall 2001 DC/AC CCFL AC/DC Backlight Adapter Inverter 3.3V Display Panel Linear VR VDC DISPLAY Battery Power Charger Selector 3.3V SDRAM SMC- Cardbus Titan KBC Clock Highest Average Power Consumer 5.0V HDD Modem DVD US

  7. Slide 7: Input Power Selector Loss

    Intel Optimizing Power Conversion Efficiency Developer Forum Input Power Selector Loss Fall 2001 185mV Voltage > 1W o Extra Drop can cause AC/DC Thermal Burden early system shutdown Charger QDSCHRG1 QDSCHRG2 RSENSE QCHRG 10m: 10m: 10m: 50W PMAX System Battery 8.1V Min Comparator 9V Ref Critical Batt

  8. Slide 8: 3V-Always Linear Regulator

    Intel Optimizing Power Conversion Efficiency Developer 3V-Always Linear Regulator Forum Fall 2001 High- High-Efficiency Switches high- high- switching efficiency 3.3V regulator to power V3- V3- Always rail Input Power VDC Selector CPU 3V-Always 3.3V 5.0V BL etc... 3.3V Linear VR Regulator 3.3V 5.0V

  9. Slide 9: Voltage Regulator Power Loss

    Optimizing Power Conversion Efficiency Intel Developer Voltage Regulator Power Loss Forum Fall 2001 78% Efficiency 90% => 9W => HOT 10 80% 9 VDC 8 70% (11.1V) VR VCORE 7 60% QSW Cntr (1.3V) Power Loss, W Mosfet RS Efficiency, % 6 50% Driver L CPU QSYN C Single- Single-Phase Topology 5 40% results in

  10. Slide 10: Intel Mobile Voltage Positioning - II

    Intel Optimizing Power Conversion Efficiency Developer Forum Intel Mobile Voltage Positioning - II Fall 2001 Multi-Phase VR Phase-Control Logic Driver VR Controller w/ 90% CPU Dual-Phase IMVP-II Driver Efficiency (%) Single-Phase 80% Higher Efficiency •Reduced Switching Loss •Lower Ripple Current •B

  11. Slide 11: System Status Improves VR Design

    Intel Optimizing Power Conversion Efficiency Developer System Status Improves VR Design Forum Fall 2001 VDC QSW V5 5V VR L QSYN Cardbus Audio etc FDD HDD DVD etc Turned OFF in S3 5.0V Output Load Current Profile 0.5-3A Predictable Step Load Current Profile < 500mA using SLP_S3# Full-ON S3 Full-ON (S

  12. Slide 12: System Status Improves VR Design

    Intel Optimizing Power Conversion Efficiency Developer Forum System Status Improves VR Design Fall 2001 Continuous Mode 100% • Lower Efficiency @ Light Load Discontinuous Continuous Efficiency (%) Discontinuous Mode 90% No-Sync FET • Lower Efficiency @ Heavy Load VR w/ SLP_S3# • Increased DC Output

  13. Slide 13: Optimizing Battery Loading

    Intel Optimizing Mobile Power Delivery Developer Forum Optimizing Battery Loading Fall 2001 DC/AC CCFL AC/DC Backlight Adapter Inverter 3.3V Display Panel Linear VR VDC DISPLAY Battery Power Charger Selector 3.3V SDRAM SMC- Cardbus Titan KBC Clock 5.0V HDD Modem DVD USB Fan 2.5V Graphic AGP GMCH-M I

  14. Slide 14: Battery Transient Analysis

    Intel Optimizing Battery Loading Developer Forum Battery Transient Analysis Fall 2001 But … How BIG is an IDEAL capacitor Battery Voltage ??? 10A Transient Smart CPU Battery CPU VRM Pack Low-Battery Low-Batt Detection VREF Ideal Ideal capacitor capacitor isolates isolates system system transient tra

  15. Slide 15: Battery Transient Analysis

    Intel Optimizing Battery Loading Developer Forum Battery Transient Analysis Fall 2001 So … How BIG is an IDEAL capacitor ??? Pocket protector Intel Page 15 Copyright © 2001 Intel Corporation. Labs

  16. Slide 16: SuperCap (Transient Suppressor)

    Intel Optimizing Battery Loading Developer Forum SuperCap (Transient Suppressor) Fall 2001 cap-XX SuperCap • C = 7 Farads CPU • ESR = 5 m: Transient with SuperCap w/o SuperCap SuperCap SuperCap Reduces Reduces Battery Battery Transient Transient by by 7x 7x Intel Labs Page 16 Copyright © 2001 Intel

  17. Slide 17: SuperCap (DVD App)

    Intel Optimizing Battery Loading Developer Forum SuperCap (DVD App) Fall 2001 with SuperCap w/o SuperCap POM 9x Ripple Reduction Battery Voltage Battery Current (1A per DIV) BOM 7x Ripple Reduction Intel Page 17 Copyright © 2001 Intel Corporation. Labs

  18. Slide 18: SuperCap (Win-Idle App)

    Optimizing Battery Loading Intel Developer SuperCap (Win-Idle App) Forum Fall 2001 with SuperCap w/o SuperCap POM 11x Ripple Reduction BOM 7x Ripple Reduction Intel Use UseSuperCap SuperCapto toutilize utilizeBattery Battery Page 18 Discharge Discharge completely completely Copyright © 2001 Intel Co

  19. Slide 19: Display Power Reduction

    Intel Optimizing Mobile Power Delivery Developer Forum Display Power Reduction Fall 2001 ‰ Recommended “Digital” or “Low-Frequency” Dimming Control to extend dimming range (Spring ’01 IDF) ‰ Proposal for Common Dimming Control Interface between Inverter & Graphic Controller DC/AC CCFL AC/DC Backligh

  20. Slide 20: Dimming Control Interface

    Intel Display Power Reduction Developer Forum Dimming Control Interface Fall 2001 CCFL DC/AC Dimming Dimming Keyboard Inverter Control Adjust Graphic DISPLAY Controller PANEL Key Parameters ‰ Supported by OEMs & Suppliers ‰ Low Cost ‰ Memory (ability to retain last setting) ‰ High Resolution Capabil

  21. Slide 21: Dimming Control Interface Graphic Controller

    Intel Display Power Reduction Developer Forum Dimming Control Interface Fall 2001 PWM CCFL Graphic DC/AC Controller Inverter DISPLAY PANEL Key Specifications ‰ 3.3V CMOS signal level ‰ Adjustable Frequency 10-10kHz “Standardized” “Standardized” Backlight Backlight Control Control Interface Optimizes

  22. Slide 22: Summary

    Intel Developer Summary Forum Fall 2001 ‰ Mobile power system greatly impacts battery life ‰ Premature System Shutdown inhibits full battery utilization ‰ Low VR efficiency at heavy load carries heavy thermal burden ‰ Lack of Backlight Dimming Control “standards” hinders optimal power management for

  23. Slide 23: Call to Action

    Intel Developer Call to Action Forum Fall 2001 ‰ Use IMVP-II for CPU to increase efficiency at heavy load condition ‰ Use System Status to increase system VR efficiency at light load condition ‰ Switch linearly regulated rails to high- efficiency regulator when possible ‰ Use SuperCap to reduce batt

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