Andes Technology Corp. · TWSE:6533
Andes Technology — Q1 2021 Earnings Presentation
47 slides from Andes Technology's earnings presentation, 2021
Slide 1: Andes Technology Corp. Investor Conference Report
Andes Technology Corp. Investor Conference Report
Slide 2: Safe Harbor Notice
Safe Harbor Notice Except for the historical information contained herein, the matters addressed in this presentation are forward-looking statements that involve certain risks and uncertainties that could cause actual results to differ materially, including but not limited to weather, impact of comp
Slide 3: Table of Contents
Table of Contents 01 Company Overview 02 Operation Results 03 Product Applications 04 New Products and Ecosystems 05 Concluding Remarks 3
Slide 4: Company Overview
Company Overview http://www.andestech.com
Slide 5: Andes Highlights
Andes Highlights • Founded in March 2005 in Hsinchu Science Park, Taiwan, ROC. • Well-established high technology IPO company • Over 220 people; 80% are engineers. • TSMC OIP Award “Partner of the Year” for New IP (2015) • Founding Premier membership in the RISC-V International Association (RISC-V F
Slide 6: Business Status Overview
Business Status Overview 200+ commercial licensees Geographically distributed in Taiwan, China, Korea, Japan, Europe, and USA Andes- 500+ license agreements signed Embedded SoC AndeSight™ IDE: 19,000+ installations IP / EDA Design Service / Foundries Eco-system: 160+ partners Developme
Slide 7: Operation Results
Operation Results http://www.andestech.com
Slide 8: 1Q21 Revenue Analysis
1Q21 Revenue Analysis QoQ YoY -43.7% +42.8% (NT$ thousands) 8
Slide 9: 2021Q1 Top Customers Analysis by Revenue
2021Q1 Top 10 Customers Analysis by Revenue (NT$ thousands) 9
Slide 10: 1Q21 Royalty Analysis
1Q21 Royalty Analysis QoQ YoY -6.3% +68.2% (NT$ thousands) 10
Slide 11: 2021Q1 Top Royalty Contributors by Application
2021Q1 Top 10 Royalty Contributors Analysis by Application (NT$ thousands) 11
Slide 12: 1Q21 Consolidated Gross Margin
1Q21 Consolidated Gross Margin (NT$ thousands) 12
Slide 13: 1Q21 Consolidated Operating Expenses
1Q21 Consolidated Operating Expenses QoQ YoY -3.5% -5.3 % (NT$ thousands) 13
Slide 14: 1Q21 Consolidated Operating Income (Loss)
1Q21 Consolidated Operating Income (Loss) QoQ YoY -89.5% -% (NT$ thousands) 14
Slide 15: 1Q21 Consolidated Operating Margin
1Q21 Consolidated Operating Margin QoQ YoY -38.08 PT +46.0 PT (%) 15
Slide 16: 1Q21 Consolidated Net Income (Loss)
1Q21 Consolidated Net Income (Loss) YoY QoQ -% -77% (NT$ thousands) 16
Slide 17: 1Q21 Consolidated Net Profit Margin
1Q21 Consolidated Net Profit Margin QoQ YoY -26.38 PT +53.99 PT (%) 17
Slide 18: 1Q21 Consolidated EPS
1Q21 Consolidated EPS QoQ YoY -2.16 $ +1.54 $ (NT$ thousands) 18
Slide 19: 1Q21 Revenue Analysis by Payment Model
1Q21 Revenue Analysis by Payment Model 19
Slide 20: 1Q21 Revenue Analysis by Region
1Q21 Revenue Analysis by Region 20
Slide 21: 1Q21 Revenue Analysis by Product
1Q21 Revenue Analysis by Product 21
Slide 22: 1Q21 Revenue Analysis - RISC-V
1Q21 Revenue Analysis - RISC-V 22
Slide 23: Product Applications
Product Applications http://www.andestech.com
Slide 24: Andes Updates
Andes Updates A 16-year-old public CPU IP company 2B+ Andes-Embedded SoC annually in 2020 GNU Toolchains A founding premier member of the RISC-V International An active role in RISC-V International & its LLVM extension task groups RISC-V Board Director Vice Chair of Technical Steering Commit
Slide 25: Andes Embedded in Various Applications
Andes Embedded in Various Applications Sensor Hub WiFi/ BT/ GPS/ FM (combo) NFC Smart Speakers: Bike Sharing: X-Trail: Controller Touch WiFi IoT GPS Ctrl ADAS Ctlr Storage Screen Controller Controller Switch: Andes Embedded in Smart Phones Game Flash Ctlr In leading machine learning computers for
Slide 26: V5 Adoptions: From MCU to Datacenters
V5 Adoptions: From MCU to Datacenters Edge to Cloud ADAS Datacenter AI accelerators AIoT SSD: enterprise (& consumer) Blockchain 5G macro/small cells FPGA MCU Multimedia Security Wireless (BT/WiFi) 40nm to 5nm 5G Macro Many in AI 26
Slide 27: Andes RISC-V Cores Adopted in SoC
Andes RISC-V Cores Adopted in SoC o single core ooooo oooooooooooooooooooo…oooooooooooooooooooo 2-8 cores ooo oooooooooooooooooooo…oooooooooooooooooooo oooooooooooooooooooo…oooooooooooooooooooo oooooooooooooooooooo…oooooooooooooooooooo oooooooo oooooooooooooooooooo…oooooooooooooooooooo oooooooo oooo
Slide 28: New Products and Ecosystems
New Products and Ecosystems http://www.andestech.com
Slide 29: Andes RISC-V Product Overview
Andes RISC-V Product Overview Best extensions to RISC-V AndeStar™ Architecture V5 AndesCore™ AndeSight™ Highly optimized Processors Tools Professional IDE design with Standby EDM COP Intf with high code & VIC leading PPA AndesCore uCore quality ITLB MMU/MPU DTLB Instr Instr LM Data LM Data Cache Int
Slide 30: Andes RISC-V Product Roadmap
Andes RISC-V Product Roadmap RV32/RV64 Vector Ext. Superscalar Benefits A25MP 27-Series: 45-Series: 512-bit SIMD raises Cache-Coherent AX25MP MobileNet by 30x 1-4 Cores Dual Issue (CNN for mobile vision) Vector Ext. MemBoost MemBoost NX27V N45/NX45 boost performance D45/DX45 by 50% Linux with A25 A2
Slide 31: Andes V5 Architecture for All Levels of Computing
Andes V5 Architecture for All Levels of Computing AndeStar™ V5 CPUs Conventional Computing Domain Specific Architecture Architecture (DSA) RV32/64 Andes Extension N/D-series Leading PPA Embedded Processor Define custom instruction to N22 N(X)25 D25… IoT, Sensing, Storage, Audio, GPS handle time crit
Slide 32: Andes Processors to Fit Your AI
Andes Processors to Fit Your AI Data Center Automotive Mobile AR/VR Surveillance • ADAS, HDR • > 10 cameras Smart Home • Face unlock Vector CPUs • Bokeh Smart Camera • Avatar • Intelligent HMI • SLAM • Barge-in • Gesture recognition Smart IoT Devices • High resolution • Beamforming • Speech to text
Slide 33: RISC-V DSP Extension
RISC-V DSP Extension • Andes contributed market-proven DSP(SIMD) as P-Extension • Designed to accelerate slow video, audio/voice and low data rate DSP workloads Real world speedup using P-Extension DSP MP3 decode 2 RV32P AMR voice codec 3.7 ML-KWS (keyword spotting) 5.2 PNET (90% of Face Detection)
Slide 34: NX27V One Vector for All Implementations
NX27V One Vector for All Implementations *512b Cloud Computing – Datacenter, HPC, Server *256b NX27V Edge Computing – 5G, Vision Processing Endpoint Computing – Natural Language Processing *128b * Configurable compute data width (VLEN) 34
Slide 35: Andes Custom Extension
Andes Custom Extension ACE unlocks RISC-V’s Potential of DSA • Define ACE instruction to handle time critical codes • Another approach to co-processor or accelerators All-in-one COPILOT development environment • Automation tool and ease of use • Extensions are easy to re-use, can be used as a li
Slide 36: Taking RISC-V Cores to Next Level
Taking RISC-V Cores to Next Level Andes is the world-leading supplier shipping the commercial RISC-V cores to market with the support of • D25, D45, A(X)25(MP), A(X)27(L2), P-Extension A(X)45(MP) V-Extension • NX27V, NX45V Custom-Extension • Entire 25, 27, 45 series (w/ ACE* support) *: Andes Custo
Slide 37: Bring Andes Strength to RISC-V Cores
Bring Andes Strength to RISC-V Cores Performance • Leading PPA and code size & Extensibility • Rich data processing in P, V, and ACE Configurability • Flexible configurations for rich features • Compiler optimizations, and SW stacks Maturity • Comprehensive features in AndeSight IDE 37
Slide 38: Aggressive in RISC-V Community
Aggressive in RISC-V Community Contributing hardware architecture extensions Chair of the P-extension (Packed SIMD/DSP) Task Group Co-chair of Fast Interrupts Task Group Closely reviewing activities of other Task Groups 38
Slide 39: Andes Helps Strengthen RISC-V Ecosystem
Andes Helps Strengthen RISC-V Ecosystem More choices for customers are good Andes works closely with partners to grow RISC-V ecosystem 39
Slide 40: Andes Position in RISC-V
Andes Position in RISC-V Complete product portfolio Reliable RISC-V core IP vendor Extreme low power consumption, high computing efficiency World’s leading P-, V- and Custom-Ext. Capable RISC-V cores Professional custom computing service 40
Slide 41: Two Ecosystems: Andes and Knect.me
Two Ecosystems: Andes and Knect.me 41
Slide 42: Knect.me Ecosystem
Knect.me™ Ecosystem Built up the community to help FlashFetch Flash/ AndesCore Data RAM ROM/ AHB Intf RAM DMA AHB Masters SPI developing IoT products (quad speed) LMBRG LMBRG AHB Bus AHB Slaves MAC/PHY Crypto Engine Matrix OTP for password, To knect solutions for silicon IP’s, keys, etc. APB Bri
Slide 43: FreeStart Program
FreeStart Program FreeStart Evaluation Program (FSEP) Support Package (FSSP) For all RISC-V enthusiasms and For all educator/researcher $20K for 1st year, including Fixed-Configuration N22 RTL • 1 year e-service Sign simple evaluation agreement directly on • FreeStart AE250 RTL website
Slide 44: Event Promotion
Event Promotion RISC-V CON RISC-V CON Silicon Valley Beijing RISC-V CON Shanghai RISC-V CON RISC-V CON Hsinchu Shenzhen RISC-V CON series RISC-V Summit, Forum, Workshop & Meetup series TSMC Symposium & OIP series RISC-V Summit in San Jose 2020: Diamond Sponsor 44
Slide 45: Concluding Remarks
Concluding Remarks http://www.andestech.com
Slide 46: A Trusted Computing Expert
A Trusted Computing Expert Successfully rolled out new series of RISC-V cores (w/ leading P-, V- and Custom-Ext.), custom computing service and FreeStart program to extend more oppty. Andes Aggressively involved in RISC-V International new technology development, contributing and Technology leveragi
Slide 47: Thank You
Thank You http://www.andestech.com +886-3-5726533 47