Andes Technology Corp. · TWSE:6533

Andes Technology — Silicon IP Corporate Day hosted by SinoPac Securities Corp. (July 2020)

41 slides from Andes Technology's conference presentation, Jul 22, 2020

  1. Slide 1: Investor Conference Report for Silicon IP Corporate Day

    Andes Technology Corp. Investor Conference Report for Silicon IP Corporate Day hosted by SinoPac Securities Corp. 2020/7/22

  2. Slide 2: Safe Harbor Notice

    Safe Harbor Notice Except for the historical information contained herein, the matters addressed in this presentation are forward-looking statements that involve certain risks and uncertainties that could cause actual results to differ materially, including but not limited to weather, impact of comp

  3. Slide 3: Table of Contents

    Table of Contents 01 Company Overview 02 Operation Results 03 Product Applications 04 New Products and Ecosystems 05 Concluding Remarks

  4. Slide 4: Company Overview

    Company Overview http://www.andestech.com

  5. Slide 5: Andes Highlights, Mission, Emerging Opportunities

    Andes Highlights • Founded in March 2005 in Hsinchu Science Park, Taiwan, ROC. • Well-established high technology IPO company • Just over 200 people; 80% are engineers. • EETimes' Silicon 60 Hot Startups to Watch (2012) • TSMC OIP Award “Partner of the Year” for New IP (2015) • Founding Premier memb

  6. Slide 6: Business Status Overview

    Business Status Overview  200+ commercial licensees  Geographically distributed in Taiwan, China, Korea, Japan, Europe, and USA Andes-  400+ license agreements signed Embedded SoC  AndeSight™ IDE:  17,000+ installations IP / EDA Design Service / Foundries  Eco-system:  150+ partners Developme

  7. Slide 7: Operation Results

    Operation Results http://www.andestech.com

  8. Slide 8: Agreement Growth Analysis

    Agreement Growth Analysis 160 500 450 About us 140 400 120 350 100 300 80 250 200 60 150 40 100 20 50 0 0 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 1H20 IP agreements 1 2 3 6 12 16 16 24 27 27 31 39 43 141 82 Accumulated IP agreements 1 3 6 12 24 40 56 80 107 134 165 204

  9. Slide 9: 1H20 Revenue Analysis

    1H20 Revenue Analysis YoY -11.2% About us (單位:新台幣千元) 233,796 240,000 220,000 207,659 200,000 180,000 160,000 140,000 120,000 1H19 1H20 9

  10. Slide 10: 1H20 Royalty Analysis

    1H20 Royalty Analysis 120,000 33 35 110,000 About us 28 30 100,000 90,000 25 25 80,000 70,000 20 60,000 15 15 50,000 15 40,000 9 10 30,000 5 20,000 5 2 10,000 1 Our Services - 0 2011 2012 2013 2014 2015 2016 2017 2018 2019 1H20 Royalty 445 660 1,285 10,819 12,232 13,320 38,287 74,953 106,716 63,469

  11. Slide 11: 1H20 Revenue Analysis by Payment Model

    1H20 Revenue Analysis by Payment Model Running Royalty License Fee Custom Computing Service Maintenance & Others About us 11% 31% 28% 30% 11

  12. Slide 12: 1H20 Revenue Analysis by Region

    1H20 Revenue Analysis by Region Taiwan USA China Korea Europe Japan About us 1% 4% 21% 40% 33% 12

  13. Slide 13: 1H20 Customer Application Analysis

    1H20 Customer Application Analysis 6% About us 6% 19% Audio 6% IoT Navigation 6% AI 13% Others 6% Sensing Automotive Networking 13% 13% Video 13% Storage 13

  14. Slide 14: 1H20 Revenue Analysis by Product

    1H20 Revenue Analysis by Product N8 1% 1% 1% 1% Customized IP 29% About usV3 3% 41% 23% D25 RISC-V 4% Service Custom Computing N25 6% 30% D10 N9 7% AX25 N10 NX25 8% N13 20% N22 ACE 9% Platform IP 13% N7 OTHERS 14

  15. Slide 15: 1H20 Revenue Analysis - RISC-V

    1H20 Revenue Analysis - RISC-V 85,584 90,000 About us 80,000 70,000 60,000 53,086 46,159 50,000 41,894 38,604 38,554 40,000 30,000 21,099 21,349 16,740 20,000 41.2% 21.0% 55.1% 19.9% 36.5% 10.8% Our Services 10,000 - 2Q19 1Q20 2Q20 V3 RISC-V Custom Computing 15

  16. Slide 16: Product Applications

    Product Applications http://www.andestech.com

  17. Slide 17: Andes Updates

    Andes Updates  A 15-year-old public CPU IP company  1.5B+ Andes-Embedded SoC annually in 2019 GNU Toolchains  A founding premier member of the RISC-V International  An active role in RISC-V International & its LLVM extension task groups RISC-V Board Director Vice Chair of Technical Steering Comm

  18. Slide 18: Andes Embedded in Various Applications

    Andes Embedded in Various Applications Sensor Hub WiFi/ BT/ GPS/ FM (combo) NFC Smart Speakers: Bike Sharing: X-Trail: Controller Touch WiFi IoT GPS Ctrl ADAS Ctlr Storage Screen Controller Controller Switch: Andes Embedded in Smart Phones Game Flash Ctlr  In leading machine learning computers for

  19. Slide 19: V5 Adoptions: From MCU to Datacenters

    V5 Adoptions: From MCU to Datacenters Edge to Cloud ADAS Datacenter AI accelerators AIoT SSD: enterprise (& consumer) Blockchain 5G macro/small cells FPGA MCU Multimedia Security Wireless (BT/WiFi) 40nm to 7nm 5G Macro Many in AI

  20. Slide 20: Andes RISC-V Cores Adopted in SoC

    Andes RISC-V Cores Adopted in SoC o single core ooooo oooooooooooooooooooo…oooooooooooooooooooo 2-8 cores ooo oooooooooooooooooooo…oooooooooooooooooooo oooooooooooooooooooo…oooooooooooooooooooo oooooooooooooooooooo…oooooooooooooooooooo oooooooo oooooooooooooooooooo…oooooooooooooooooooo oooooooo oooo

  21. Slide 21: New Products and Ecosystems

    New Products and Ecosystems http://www.andestech.com

  22. Slide 22: Andes RISC-V Product Overview

    Andes RISC-V Product Overview Best extensions to RISC-V AndeStar™ Architecture V5 AndesCore™ AndeSight™ Highly optimized Processors Tools Professional IDE design with Standby EDM COP Intf with high code & VIC leading PPA AndesCore uCore quality ITLB MMU/MPU DTLB Instr Instr LM Data LM Data Cache Int

  23. Slide 23: Product Lines

    Product Lines A N| DES ANDES ey RISC’ TECHNOLOGY

  24. Slide 24: Andes RISC-V Product Roadmap

    Andes RISC-V Product Roadmap RV32/RV64 Vector Ext. Superscalar Benefits A25MP 27-Series: 45-Series: 512-bit SIMD raises Cache-Coherent AX25MP MobileNet by 30x 1-4 Cores Dual Issue (CNN for mobile vision) Vector Ext. MemBoost MemBoost NX27V N45/NX45 boost performance D45/DX45 by 50% Linux with A25 A2

  25. Slide 25: Andes V5 Architecture for All Levels of Computing

    Andes V5 Architecture for All Levels of Computing AndeStar™ V5 CPUs General Computing Domain Specific Architecture Architecture (DSA) RV32/64 Andes Extension N/D-series Leading PPA Embedded Processor Define custom instruction to N22 N(X)25 D25… IoT, Sensing, Storage, Audio, GPS handle time critical

  26. Slide 26: Andes Processors to Fit Your AI

    Andes Processors to Fit Your AI Data Center Automotive Mobile AR/VR Surveillance • ADAS, HDR • > 10 cameras Smart Home • Face unlock Vector CPUs • Bokeh Smart Camera • Avatar • Intelligent HMI • SLAM • Barge-in • Gesture recognition Smart IoT Devices • High resolution • Beamforming • Speech to text

  27. Slide 27: RISC-V DSP Extension

    RISC-V DSP Extension • Andes contributed market-proven DSP(SIMD) as P-Extension • Designed to accelerate slow video, audio/voice and low data rate DSP workloads Real world speedup using P-Extension DSP MP3 decode 2 RV32P AMR voice codec 3.7 ML-KWS (keyword spotting) 5.2 PNET (90% of Face Detection)

  28. Slide 28: NX27V One Vector for All Implementations

    NX27V One Vector for All Implementations *512b Cloud Computing – Datacenter, HPC, Server *256b NX27V Edge Computing – 5G, Vision Processing Endpoint Computing – Natural Language Processing *128b * Configurable compute data width (VLEN)

  29. Slide 29: Andes Custom Extension

    Andes Custom Extension  ACE unlocks RISC-V’s Potential of DSA • Define ACE instruction to handle time critical codes • Another approach to co-processor or accelerators  All-in-one COPILOT development environment • Automation tool and ease of use • Extensions are easy to re-use, can be used as a li

  30. Slide 30: Taking RISC-V Cores to Next Level

    Taking RISC-V Cores to Next Level Andes is the leading supplier to ship the commercial RISC-V cores to market with P-Extension • D25F, A(X)25(MP), A(X)27, A(X)45 V-Extension • NX27V, NX45V Custom-Extension • Entire 25, 27, 45 series (w/ ACE* support) *: Andes Custom Extension

  31. Slide 31: Bring Andes Strength to RISC-V Cores

    Bring Andes Strength to RISC-V Cores Performance • Leading PPA and code size & Extensibility • Rich data processing in P, V, and ACE Configurability • Flexible configurations for rich features • Compiler optimizations, and SW stacks Maturity • Comprehensive features in AndeSight IDE

  32. Slide 32: Aggressive in RISC-V Community

    Aggressive in RISC-V Community  Contributing hardware architecture extensions  Chair of the P-extension (Packed SIMD/DSP) Task Group  Co-chair of Fast Interrupts Task Group  Closely reviewing activities of other Task Groups

  33. Slide 33: Andes Helps Strengthen RISC-V Ecosystem

    Andes Helps Strengthen RISC-V Ecosystem  More choices for customers are good  Andes works closely with partners to grow RISC-V ecosystem

  34. Slide 34: Andes Position in RISC-V

    Andes Position in RISC-V Complete product portfolio Reliable RISC-V core IP vendor Extreme low power consumption, high computing efficiency World’s leading P-, V- and Custom-Ext. Capable RISC-V cores Professional custom computing service 34

  35. Slide 35: Two Ecosystems: Andes and Knect.me

    Two Ecosystems: Andes and Knect.me

  36. Slide 36: Knect.me Ecosystem

    Knect.me™ Ecosystem  Built up the community to help FlashFetch Flash/ AndesCore Data RAM ROM/ AHB Intf RAM DMA AHB Masters SPI developing IoT products (quad speed) LMBRG LMBRG AHB Bus AHB Slaves MAC/PHY Crypto Engine Matrix OTP for password,  To knect solutions for silicon IP’s, keys, etc. APB Bri

  37. Slide 37: FreeStart Program

    FreeStart Program  FreeStart Evaluation Program (FSEP)  Support Package (FSSP)  For all RISC-V enthusiasms and  For all educator/researcher  $20K for 1st year, including  Fixed-Configuration N22 RTL • 1 year e-service  Sign simple evaluation agreement directly on • FreeStart AE250 RTL website

  38. Slide 38: Event Promotion

    Event Promotion RISC-V CON RISC-V CON Silicon Valley Beijing RISC-V CON Shanghai RISC-V CON RISC-V CON Hsinchu Shenzhen RISC-V CON series RISC-V Roadshow & Workshop Series TSMC symposium & OIP series RISC-V Summit in San Jose 2020: Diamond Sponsor

  39. Slide 39: Concluding Remarks

    Concluding Remarks http://www.andestech.com

  40. Slide 40: A Trusted Computing Expert

    A Trusted Computing Expert Successfully rolled out new series of RISC-V cores (w/ leading P-, V- and Custom-Ext.), custom computing service and FreeStart program to extend more oppty. Andes Aggressively involved in RISC-V Foundation new technology development, contributing and Technology leveraging

  41. Slide 41: Thank You

    Thank You http://www.andestech.com +886-3-5726533 41

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