Infineon Technologies Ag · XETR:IFX

Infineon Technologies — Technical Presentation (March 2015)

28 slides from Infineon Technologies's technical presentation, March 2015

  1. Slide 1: Advanced Silicon Devices – Applications and Technology Trends

    Advanced Silicon Devices – Applications and Technology Trends Gerald Deboy Winfried Kaindl, Uwe Kirchner, Matteo Kutschak, Eric Persson, Michael Treu APEC 2015

  2. Slide 2: Content

    Content  Silicon devices versus GaN devices: An unbiased view on key performance indicators  Applications: Comparison of devices in hard-switching and resonant circuits  Summary March 2015 Copyright © Infineon Technologies AG 2015. All rights reserved. Page 2

  3. Slide 3: Content

    Content  Silicon devices versus GaN devices: An unbiased view on key performance indicators  Applications: Comparison of devices in hard-switching and resonant circuits  Summary March 2015 Copyright © Infineon Technologies AG 2015. All rights reserved. Page 3

  4. Slide 4: Comparing competing device concepts

    Comparing competing device concepts Si SiC GaN Superjunction vertical drift zone lateral HEMT G S G G S D S n+ p+ 2DEG D p n D  Good starting point for low RON×A and QOSS due to high  Pitch influences RON×A by electron mobility improved utillization of the  Device capacitances are semiconductor v

  5. Slide 5: How far can the Superjunction concept be exploited in terms of RDSon*A?

    How far can the Superjunction concept be exploited in terms of RDSon*A? S G n p+ - pp Other 1 nepi CoolMOSTM C3 Other 2 CoolMOSTM CP CoolMOSTM C7 RDSON, max × A [Ωmm2] n+s Other 3 1.0 Ωmm2 ub 1,00 1.55 Ωmm2 D Si Superjunction MOSFET SiC FET GaN HEMT 0,10 Si Superjunction limit D. Disney, G. Dolny IS

  6. Slide 6: The output capacitance of SJ devices gets more non-linear with every generation

    The output capacitance of SJ devices gets more non- linear with every generation! 190 mOhm, 600V / 650V devices  longer delay times  lower switching losses  Stronger non-linearity  lower Eoss  higher dv/dt March 2015 Copyright © Infineon Technologies AG 2015. All rights reserved. Page 6

  7. Slide 7: The Qoss characteristic will become more and more flat

    The Qoss characteristic will become more and more flat! 190 mOhm, 600V / 650V devices  longer delay times in resonant applications  trend reversed for next gen CoolMOS™  more rectangular voltage waveforms  GaN significantly better in absolute FoM and linearity March 2015 Copyright © Infineon Tec

  8. Slide 8: Eoss scales with cell pitch and can be brought below 1st gen GaN devices

    Eoss scales with cell pitch and can be brought below the level of 1st gen GaN devices 190 mOhm, 600V / 650V devices  FoM Ron*Eoss scales with pitch of SJ device  next gen CoolMOS™ March 2015 Copyright © Infineon Technologies AG 2015. All rights reserved. Page 8

  9. Slide 9: Turn-off losses

    40% Eoss reduction versus earlier SJ generation fully translates into lower turn-off losses! 190 mOhm / 600V BoxPlot Eoff2 [mJ] (Subset:Iset2 [A] ('5,3')) grouped by GRP lo -- hi -- qty 36/36 mean 0.008648 sigma 0.002466 cp -- cpk -- 0,013 0,012 @ 5.3A [mJ] 0,011 0,01 CoolMOS™ CP 600V 0,009 next gen

  10. Slide 10: Turn-on losses

    Turn-on losses are mainly determined by package and no longer benefit from silicon improvements! 190 mOhm / 600V BoxPlot Eon [mJ] (Subset:Iset2 [A] ('5,3')) grouped by GRP lo -- hi -- qty 36/36 mean 0.0172 sigma 0.007441 cp -- cpk -- 0,035 0,03 Eon [mJ]@ 5.3A [mJ] 0,025 0,02 CoolMOS™ CP next gen Coo

  11. Slide 11: Package and switching cell optimization are mandatory for fast switching devices

    Package and switching cell optimization are mandatory to fully benefit from fast switching devices! TO-247 4pin  Package level Kelvin contact to source, - Source inductance decoupling of gate drive, most critical Eon improvement - Solved by Kelvin contact - however inductance still in the commutati

  12. Slide 12: SMD packages will be important for SJ devices and mandatory for GaN

    SMD packages will be important for SJ devices and mandatory for GaN! T_LS PCB top view:  Losses d1 s1 T_HS 85-265VAC Cheatsink TO = ~20 pF E400V Cpar = 1.6 µJ d2 s2 Edev = 3 µJ  Voltage overshoot Power loop caps Lpar TO = ~20 nH d1 s1 Elpar_10A = 1 µJ Current flow: C T_HS T_LS 85-265VAC Vovershoot

  13. Slide 13: In case of layout constraints…

    In case of layout constraints… Possible Ringing Circuit dV/ dt Example 190 mΩ Lparasitic 250 C7 η Turn Off dV/dt Layout 200 CP Cparasitic [V/ns] 150 P6 Layout 100 E6 50 C6 0 C3 0 5 10 15 20 Current ID [A] Package Damping Element Low switching losses are inevitably coupled to high Oscillation circuit

  14. Slide 14: Content

    Content  Silicon devices versus GaN devices: An unbiased view on key performance indicators  Applications: Comparison of devices in hard-switching and resonant circuits  Summary March 2015 Copyright © Infineon Technologies AG 2015. All rights reserved. Page 14

  15. Slide 15: SJ devices will prevail in classic and dual boost; GaN offers value in Totem Pole PFC

    SJ devices will prevail in classic and dual boost GaN offers significant value in Totem Pole PFC Classic PFC Dual Boost PFC Totem Pole PFC  Less System Cost  High System Cost  Less System Cost  Less Efficiency  High Efficiency  High Efficiency  High Power Density  Less Power Density  High P

  16. Slide 16: Best competing silicon alternative in power density and efficiency: TCM PFC

    Best competing silicon alternative in terms of power density and efficiency: TCM PFC 3 kW, 4.5 kW/l (74W/in³) Source: U. Badstübner, J. Miniböck, J. Kolar, „ Experimental Verification of the Efficiency/Power-Density (n-p) Pareto Front of Single-Phase Double-Boost and TCM PFC Rectifier Systems”, Proc

  17. Slide 17: Efficiency: Advantage of GaN: very high frequency operation

    Advantage of GaN: very high frequency operation with Ron*Qoss and Qg as key parameters Input Caps GaN Switches Output Caps Gate Driver RF Inductor High efficiency possible by frequency control 99% 97% 95% Efficiency 93% 2.5 MHz 91% 89% 87% 85% 0 100 200 300 400 500 Po [W] March 2015 Copyright © Infi

  18. Slide 18: Comparison of hard-switching PFC stages

    Comparison of hard-switching PFC stages: Reference: CoolMOS™ C7 / SiC G5 Reference: CCM PFC 100 kHz; CoolMOS™ C7 65 mOhm, 4pin; SiC G5 SBD 16A diode rectification bridge March 2015 Copyright © Infineon Technologies AG 2015. All rights reserved. Page 18

  19. Slide 19: Advantage of GaN: CCM modulation in Totem Pole PFC

    Advantage of GaN: CCM modulation in Totem Pole PFC, close to 99% efficiency with simple half bridge solution  0.5% better efficiency half bridge Totem Pole, 65 kHz; GaN 70 mOhm return path: bridge rectifier (one diode only) Reference: CCM PFC 100 kHz; CoolMOS C7 65 mOhm, 4 pin; SiC G5 SBD 16A March

  20. Slide 20: Advantage of GaN: >99% efficiency with SJ and GaN in full bridge Totem Pole

    Advantage of GaN: > 99% efficiency with combination of SJ and GaN in Totem Pole full bridge  0.2% better than half bridge  0.4% better than IGBT solution full bridge Totem Pole, 65 kHz; Reference: CCM PFC 100 kHz; GaN 70 mOhm / IGBT F5 40A + 16A SiC SBD CoolMOS C7 65 mOhm, 4 pin; return path: Cool

  21. Slide 21: Advantage of GaN: >99% efficiency across wide load range

    Advantage of GaN: > 99% efficiency across wide low range with low frequency Totem Pole PFC  >99% efficiency from 20..70% load  0.1% better than 65 kHz solution full bridge Totem Pole, 45 kHz; Reference: CCM PFC 100 kHz; GaN 70 mOhm CoolMOS C7 65 mOhm, 4 pin; return path: CoolMOS™ C7 35 mOhm SiC G5

  22. Slide 22: Expected performance of GaN versus latest SJ devices

    Expected performance of GaN versus latest SJ devices  Resonant LLC DC/DC Converter (750 W, 400 kHz) Q1 D1 VIN Cr Lr n:1:1 S1 A Lm VO Q2 D2 RL 0 S2  GaN expected to be 0.7% better in partial load range GaN, 70 mOhm GaN, 190 mOhm P6, 190 mOhm  350V…410 V to 12 V  Power density > 200W/in³  Pure co

  23. Slide 23: Latest SJ devices will benefit from parallel cap to counterbalance non-linearity

    Latest SJ devices will benefit from parallel cap to counterbalance non-linearity  Same dv/dt at 1/5th of magnetizing current  Potential path to further efficiency increase for narrow range Vin applications March 2015 Copyright © Infineon Technologies AG 2015. All rights reserved. Page 23

  24. Slide 24: Recent improvements in key Figure-of-Merits for low voltage MOSFETs

    Last but not least! Recent improvements in key Figure-of-Merits for low voltage MOSFETs … S 5 G Gen 3 4,5 n n 4 Gen 4 p 3,5 3 2,5 2 1,5 1 n- n+sub 0,5 sub 0 RDSon / SSO8 RDSon*Qoss D [mOhm] [mOhm*nC *100] 100 V MOSFET: smaller area-specific on-resistance and charges through further optimization of t

  25. Slide 25: Allow new solutions by using cascaded multi-cell architectures

    … Allow new solutions by using cascaded multi-cell architectures!  3 kW AC/DC converter, 48V out Cascaded converter topology, Totem Pole + phase shift ZVS Efficiency target > 98% 100 V OptiMOS™ BSC034N10NS5  FinSix 65 W Adapter, 19V out Switching frequency > 10 MHz 200 V OptiMOS™ BSZ22DN20NS3 Marc

  26. Slide 26: Content

    Content  Silicon devices versus GaN devices: An unbiased view on key performance indicators  Applications: Comparison of devices in hard-switching and resonant circuits  Summary March 2015 Copyright © Infineon Technologies AG 2015. All rights reserved. Page 26

  27. Slide 27: Summary

    Summary  Superjunction devices will continue to deliver better Best-in- Class RDSon devices with further improved FoM Ron*Eoss  Recent improvements in low voltage devices FoMs allow to rethink classic architectures and consider the use of LV devices in HV applications  The use of good layout prac

  28. Slide 28: Infineon

    Cinfineon Innovative semiconductor solutions for energy efficiency, mobility and security.

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