Slide 1: Andes Technology Corp. Investor Conference Report
Andes Technology Corp. Investor Conference Report
Slide 2: Safe Harbor Notice
Safe Harbor Notice Except for the historical information contained herein, the matters addressed in this presentation are forward-looking statements that involve certain risks and uncertainties that could cause actual results to differ materially, including but not limited to weather, impact of comp
Slide 3: Table of Contents
Table of Contents 01 Company Overview 02 Operation Results 03 Product Applications 04 New Products and Ecosystems 05 Concluding Remarks 3
Slide 4: Company Overview
Company Overview http://www.andestech.com
Slide 5: Andes Highlights
Andes Highlights • Founded in March 2005 in Hsinchu Science Park, Taiwan, ROC. • Well-established high technology IPO company • Over 260 people; 80% are engineers. • TSMC OIP Award “Partner of the Year” for New IP (2015) • Founding Premier membership in the RISC-V International Association (RISC-V F
Slide 6: Business Status Overview
Business Status Overview ❖ 200+ commercial licensees ◼ Geographically distributed in Taiwan, China, Korea, Japan, Europe, and USA Andes- ◼ 500+ license agreements signed Embedded SoC ❖ AndeSight™ IDE: ◼ 22,000+ installations IP / EDA Design Service / Foundries ❖ Eco-system: ◼ 500+ partners Developme
Slide 7: Operation Results
Operation Results http://www.andestech.com
Slide 8: 4Q21 Revenue Analysis
4Q21 Revenue Analysis QoQ YoY +40% +0.2% (NT$ thousands) 8
Slide 9: 21Q1-Q4 Revenue Analysis
21Q1-Q4 Revenue Analysis YoY +41.1% (NT$ thousands) 9
Slide 10: 21Q1-Q4 Top 10 Customers Analysis by Revenue
21Q1-Q4 Top 10 Customers Analysis by Revenue (NT$ thousands) 10
Slide 11: 4Q21 Royalty Analysis
4Q21 Royalty Analysis QoQ YoY +7.6% -4.4% (NT$ thousands) 11
Slide 12: 21Q1-Q4 Royalty Analysis
21Q1-Q4 Royalty Analysis YoY +47.2% (NT$ thousands) 12
Slide 13: Royalty Analysis
Royalty Analysis (NT$ thousands) (Numbers) 13
Slide 14: 21Q1-Q4 Top 10 Customers Analysis by Royalty
21Q1-Q4 Top 10 Customers Analysis by Royalty (NT$ thousands) 14
Slide 15: 21Q1-Q4 Revenue Analysis by Payment Model
21Q1-Q4 Revenue Analysis by Payment Model 15
Slide 16: 21Q1-Q4 Revenue Analysis by Region
21Q1-Q4 Revenue Analysis by Region 16
Slide 17: 21Q1-Q4 Revenue Analysis by Product
21Q1-Q4 Revenue Analysis by Product 17
Slide 18: 4Q21 Revenue Analysis - RISC-V
4Q21 Revenue Analysis - RISC-V (NT$ thousands) 18
Slide 19: 21Q1-Q4 Revenue Analysis - RISC-V
21Q1-Q4 Revenue Analysis - RISC-V (NT$ thousands) 19
Slide 20: Product Applications
Product Applications http://www.andestech.com
Slide 21: Andes Updates
Andes Updates ❖ A 17-year-old public CPU IP company ❖ 3B+ Andes-Embedded SoC annually in 2021 GNU Toolchains ❖ A founding premier member of the RISC-V International ❖ An active role in RISC-V International & its extension task groups LLVM RISC-V Board Director Member of Technical Steering Committee
Slide 22: Andes Embedded in Various Applications
Andes Embedded in Various Applications Sensor Hub WiFi/ BT/ GPS/ FM (combo) NFC Smart Speakers: Bike Sharing: X-Trail: Controller Touch WiFi IoT GPS Ctrl ADAS Ctlr Storage Screen Controller Controller Switch: Andes Embedded in Smart Phones Game Flash Ctlr ❖ In leading machine learning computers for
Slide 23: V5 Adoptions: From MCU to Datacenters
V5 Adoptions: From MCU to Datacenters ❖Edge to Cloud ADAS Datacenter AI accelerators AIoT SSD: enterprise (& consumer) Blockchain 5G macro/small cells FPGA MCU Multimedia Security Wireless (BT/WiFi) ❖40nm to 5nm 5G Macro ❖Many in AI 23
Slide 24: Andes RISC-V Cores Adopted in SoC
Andes RISC-V Cores Adopted in SoC o single core ooooo oooooooooooooooooooo…oooooooooooooooooooo 2-8 cores ooo oooooooooooooooooooo…oooooooooooooooooooo oooooooooooooooooooo…oooooooooooooooooooo oooooooooooooooooooo…oooooooooooooooooooo oooooooo oooooooooooooooooooo…oooooooooooooooooooo oooooooo oooo
Slide 25: New Products and Ecosystems
New Products and Ecosystems http://www.andestech.com
Slide 26: Andes RISC-V Product Overview
Andes RISC-V Product Overview Best extensions to RISC-V AndeStar™ Architecture V5 AndesCore™ AndeSight™ Highly optimized Processors Tools Professional IDE design with Standby EDM COP Intf with high code & VIC leading PPA AndesCore uCore quality ITLB MMU/MPU DTLB Instr Instr LM Data LM Data Cache Int
Slide 27: Andes V5 Architecture for All Levels of Computing
Andes V5 Architecture for All Levels of Computing AndeStar™ V5 CPUs Conventional Computing Domain Specific Architecture Architecture (DSA) RV32/64 Andes Extension N/D-series Leading PPA Embedded Processor Define custom instruction to N22 N(X)25 D25… IoT, Sensing, Storage, Audio, GPS handle time crit
Slide 28: Andes RISC-V Product Roadmap
Andes RISC-V Product Roadmap RV32/RV64 Vector Ext. Superscalar A25MP Benefits Cache-Coherent AX25MP 1-4 Cores 45-Series: 27-Series: 512-bit SIMD raises MobileNet by 66x Vector Ext. Dual Issue (CNN for mobile vision) MemBoost MemBoost Linux with A25 FPU/DSP AX25 NX27V N45/NX45 boost performance D45 b
Slide 29: AndeCore 45-Series
AndeCore™ 45-Series 32-bit AndesCore™ N45/D45/A45/A45MP 64-bit AndesCore™ NX45/AX45/AX45MP 29
Slide 30: AndesCore 45-Series Overview
AndesCore™ 45-Series Overview PLIC PMU Debug ◼ 8-stage In-Order Dual-Issue ◼ AndeStar™ V5 ISA: ⚫ RV*GCN (S/D FPU): All Series Interrupt WFI HW Bkpt Intf. ⚫ RV*P-ext (DSP/SIMD): D45/A(X)45 ⚫ MMU for Linux Applications: A(X)45 45-series uCore, PMP/PMA ◼ MemBoost memory subsystem MMU Br. Pred FPU/DSP ◼
Slide 31: AndesCore 45 vs. 25 Series Performance Enhancement
AndesCore™ 45 vs. 25 Series Performance Enhancement ◼ > 1.5X Coremark & Dhrystone performance enhancement, compared with single-issue 25 series 5.50 31
Slide 32: AX45 Can Do More (vs. 64bit A-series)
AX45 Can Do More (vs. 64bit A-series) ◼ A53 ◼ AX45 ⚫ 8-stage In-Order Dual Issue ⚫ 8-stage In-Order Dual Issue ⚫ Widely adopted by industries ⚫ Performance is better! in many applications • Coremark/MHz: 1.32x • Dhrystone/MHz: 1.37x 32
Slide 33: Target Applications of 27 & 45-Series
Target Applications of 27 & 45-Series ◼ AI/Deep Learning ◼ Video Surveillance ◼ AR/VR ◼ 5G ◼ ADAS ◼ Networking ◼ V2X (Vehicle to Everything) ◼ IVI (In-Vehicle-Infotainment) ◼ Storage Metaverse and more… 33
Slide 34: Andes Processors to Fit Your AI
Andes Processors to Fit Your AI Data Center Automotive Mobile AR/VR Surveillance • ADAS, HDR • > 10 cameras Smart Home • Face unlock Vector CPUs • Bokeh Smart Camera • Avatar • Intelligent HMI • SLAM • Barge-in • Gesture recognition Smart IoT Devices • High resolution • Beamforming • Speech to text
Slide 35: RISC-V DSP Extension
RISC-V DSP Extension • Andes contributed market-proven DSP(SIMD) as P-Extension • Designed to accelerate slow video, audio/voice and low data rate DSP workloads Real world speedup using P-Extension DSP MP3 decode 2 RV32P AMR voice codec 3.7 ML-KWS (keyword spotting) 5.2 PNET (90% of Face Detection)
Slide 36: NX27V One Vector for All Implementations
NX27V One Vector for All Implementations *512b Cloud Computing – Datacenter, HPC, Server *256b NX27V Edge Computing – 5G, Vision Processing Endpoint Computing – Natural Language Processing *128b * Configurable compute data width (VLEN) 36
Slide 37: Andes Custom Extension
Andes Custom Extension ❖ ACE unlocks RISC-V’s Potential of DSA • Define ACE instruction to handle time critical codes • Another approach to co-processor or accelerators ❖ All-in-one COPILOT development environment • Automation tool and ease of use • Extensions are easy to re-use, can be used as a li
Slide 38: Taking RISC-V Cores to Next Level
Taking RISC-V Cores to Next Level ❖Andes is the world-leading supplier shipping the commercial RISC-V cores to market with the support of • D25, D45, A(X)25(MP), A(X)27(L2), P-Extension A(X)45(MP) V-Extension • NX27V, NX45V Custom-Extension • Entire 25, 27, 45 series (w/ ACE* support) *: Andes Custo
Slide 39: Bring Andes Strength to RISC-V Cores
Bring Andes Strength to RISC-V Cores Performance • Leading PPA and code size & Extensibility • Rich data processing in P, V, and ACE Configurability • Flexible configurations for rich features • Compiler optimizations, and SW stacks Maturity • Comprehensive features in AndeSight IDE 39
Slide 40: Aggressive in RISC-V Community
Aggressive in RISC-V Community ❖ Contributing hardware architecture extensions ◼ Chair of the P-extension (Packed SIMD/DSP) Task Group ◼ Co-chair of Fast Interrupts Task Group ◼ Closely reviewing activities of other Task Groups 40
Slide 41: Andes Helps Strengthen RISC-V Ecosystem
Andes Helps Strengthen RISC-V Ecosystem ❖ More choices for customers are good ❖ Andes works closely with partners to grow RISC-V ecosystem 41
Slide 42: Andes Position in RISC-V
Andes Position in RISC-V Complete product portfolio Reliable RISC-V core IP vendor Extreme low power consumption, high computing efficiency World’s leading P-, V- and Custom-Ext. Capable RISC-V cores Professional custom computing service 42
Slide 43: Concluding Remarks
Concluding Remarks http://www.andestech.com
Slide 44: A Trusted Computing Expert
A Trusted Computing Expert Successfully rolled out new series of RISC-V cores (w/ leading P-, V- and Custom-Ext.), custom computing service and FreeStart program to extend more oppty. Andes Aggressively involved in RISC-V International new technology development, contributing and Technology leveragi
Slide 45: Thank You
Thank You http://www.andestech.com +886-3-5726533 45