Aspeed Technology, Inc. · TPEX:5274

Aspeed Technology — Conference Presentation (March 2026)

18 slides from Aspeed Technology's conference presentation, March 2026

  1. Slide 1: Quantum-Resistant Architecture Begins at the Chip

    量子抗性架構從晶片開始 Quantum-Resistant Architecture Begins at the Chip © ASPEED Technology. Property and Confidential​ Chris Lin ｜ March 2026

  2. Slide 2: Safe Harbor Notice

    Safe Harbor Notice ASPEED’s statements of its current expectations are forward-looking statements subject to significant risks and uncertainties and actual results may differ materially from those contained in the forward- looking statements. Except as required by law, we undertake no obligation to

  3. Slide 3: Quantum computers break it in seconds

    以數學為基礎的安 全性時代已結束 Quantum computers break it in seconds. © ASPEED Technology. Proprietary and Confidential.

  4. Slide 4: 透過 CNSA 2.0 與 Caliptra 達成量子韌性

    透過 CNSA 2.0 與 Caliptra 達成量子韌性 Mandatory cryptographic migration. Embedding post-quantum security directly into the silicon to create an immutable Root of Trust. © ASPEED Technology. Proprietary and Confidential.

  5. Slide 5: ASPEED BMC 符合 CNSA 2.0

    ASPEED BMC 符合 CNSA 2.0 “ASPEED is the first adopter of OCP Caliptra, embedding post-quantum security directly into the silicon to create an immutable Root of Trust” © ASPEED Technology. Proprietary and Confidential.

  6. Slide 6: CNSA 時間表

    CNSA 時間表 Aggressive. Non-Negotiable. Mandatory. 2025 (The Immediate Hurdle) 2030 (The Hard Stop) 2033 (The Sunset) SW/FW Signing Default: Hardware Mandate: All new Legacy Retired: Complete removal Must use CNSA 2.0 (LMS, XMSS) equipment purchases MUST be of RSA/ECC cryptography PQC compliant ※ Desig

  7. Slide 7: Caliptra 由產業領導者支持

    Caliptra 由產業領導者支持 © ASPEED Technology. Proprietary and Confidential.

  8. Slide 8: 為 BMC、CPU、GPU、DPU 與 TPU 提供安全基礎

    為 BMC、CPU、GPU、DPU 與 TPU 提供安全基礎 A reusable Hardware IP block embedded directly into the silicon.  Root of Trust for Measurement (RTM)  Secure Boot  PQC algorithms  Caliptra consists of: ◎ RTL (hardware) ◎ ROM code ◎ Firmware code © ASPEED Technology. Proprietary and Confidential.

  9. Slide 9: 晶片身分來源 DICE

    晶片身分來源 DICE – Device Identifier Composition Engine  UDS is the hardware unique key, accessible only by Caliptra.  Measurement: hash operations © ASPEED Technology. Proprietary and Confidential.

  10. Slide 10: 使用 PUF 鞏固 Caliptra 的基礎

    使用 PUF 鞏固 Caliptra 的基礎 Meets Caliptra’s requirements for a high-entropy, unique secret. PUF: Superior Source for the Unique Device Secret (UDS) for Caliptra. “Even the manufacturer cannot create two identical chips.” High entropy powered by PUF is perfect for quantum-resistant architecture. © ASPEED

  11. Slide 11: ASPEED 如何建立全面安全完整性 (Total Integrity)

    ASPEED 如何建立全面安全完整性 (Total Integrity) Blocking threats with Chain of Trust. Hardware RoT Operating System Application Firmware (Caliptra) (OS) (App) Signature Signature Signature Verification Verification Verification Secure Boot Silicon Root of Trust Verify first, then execute. Hardware cannot be ta

  12. Slide 12: OCP S.A.F.E. 合規性

    OCP S.A.F.E. 合規性 Standardizing security audits for the supply chain. The Problem: Traditional security audits are fragmented. The Solution: A standardized framework. 3rd Party Verification: Independent security labs approved by OCP. Supply Chain Trust: Transparent, objective proof that ASPEED's firm

  13. Slide 13: PQC 持續演進：我們的解決方案具備未來前瞻性

    PQC 持續演進：我們的解決方案具備未來前瞻性 Embracing the dynamic nature of post-quantum cryptography. The Standard in NOT Static. Crypto-Agility is Key. Continuous Monitoring. Long-Term Commitment. © ASPEED Technology. Proprietary and Confidential.

  14. Slide 14: 融合 PUF、PQC 與 Caliptra 以打造量子抗性資料中心

    融合 PUF、$PQC$ 與 Caliptra 以打造量子抗性資料中心 Caliptra This industry standard Root of (Standard) Trust is PQC-ready and execute boot measurements. PUF (Entropy) PQC (Algorithm) True randomness derived from NIST-standard algorithms designed physical silicon variations (the to resist quantum attacks, and it sil

  15. Slide 15: 量子韌性產品發展路線圖

    量子韌性產品發展路線圖 Delivering quantum-resilient OCP Caliptra security across the entire ASPEED product portfolio. BMC AST2700 AST2755 AST2800 Caliptra v1.2 Caliptra v2.1 Caliptra v3.x BIC AST1040 New BIC Caliptra v2.1 Caliptra v3.x PFR AST1080 New PFR Caliptra v2.1 Caliptra v3.x 2026 2027 2028 2029 2030 ©

  16. Slide 16: BMC TAM（整體有效市場）預測修正

    BMC TAM（整體有效市場）預測修正 ⚫ We see huge demand for AI-related General Server for agentic AI workload and simple inference tasks. ⚫ BMC TAM is estimated to be 65.77 million units in 2030. Million Units BMC TAM Forecast by ASPEED in March 2026 70 60 50 40 30 20 10 0 2026 2027 2028 2029 2030 BMC for General

  17. Slide 17: 2026年第二季營運展望

    2026年第二季營運展望 For 2026 Q2, we currently expect: ⚫ Consolidated Revenue: Around NT$3.4 billion ~ 3.6 billion ⚫ Gross margin: 67% ~ 68% © ASPEED Technology. Proprietary and Confidential.

  18. Slide 18: © ASPEED Technology. Proprietary and Confidential.

    © ASPEED Technology. Proprietary and Confidential.

ASPEED Technology — Conference Presentation (March 2026) on 6ix