Infineon Technologies Ag · XETR:IFX
Infineon Technologies — Technical Presentation (April 2015)
15 slides from Infineon Technologies's technical presentation, April 2015
Slide 1: TO-Leadless
TO-Leadless Optimized for high current applications
Slide 2: Package for high current applications
Package for high current applications TO-Leadless is a perfect fit for applications with high power & high reliability requirements Forklift Light electric vehicles (LEV) such as e-scooter, µ-cars PoL (Point of Load) Telecom
Slide 3: Differentiation of Infineon's high power packages @ a glance
Differentiation of Infineon’s high power packages @ a glance D²PAK D²PAK 7pin TO-LeadLess Power Density Current Capability Thermal Performance Height Reliability
Slide 4: More details on parameters of high current packages
More details on parameters of high current packages D²PAK D²PAK 7pin TOLL 30V 3.4 mΩ 0.9 mΩ 0.4 mΩ lowest RDS(on) 60V 1.9 mΩ 1.0 mΩ 0.75 mΩ 100V 2.7 mΩ 2.5 mΩ 2.0 mΩ 150V 7.2 mΩ 6.5 mΩ 5.9 mΩ Package Resistance 0.74 mΩ 0.44 mΩ 0.25 mΩ Current Capability 120A 180 A 300 A Footprint 150 mm² 150 mm² 115
Slide 5: TO-Leadless a replacement for D²PAK 7Pin
TO-Leadless a replacement for D²PAK 7Pin 4.4mm 2.3mm 9.9mm 11.7mm 10.0mm 15mm Footprint: 150 mm² Footprint: 115 mm² 30% 50% 60% Footprint Height Space Reduction Reduction reduction
Slide 6: TO-leadless offers advantages where high level of parallelization is required
TO-leadless offers advantages where high level of parallelization is required 150V Voltag Class 100V 60V TOLL D²PAK 7pin 30V SuperSO8 low high Level of Parallelization
Slide 7: Improved Reliability: Bottleneck Solder Joint / Current density
Improved Reliability: Bottleneck Solder Joint / Current density D2PAK 7Pin TO -LeadLess Bnom =0.8mm bnom =0.6mm Lnom =1.9mm Lnom =2.65mm L3nom =0.7mm enom =1.2mm Contact/Solder area D2PAK 7Pin: Contact/Solder area TOLL: =2.65mm*0.6mm*5 ~1.9mm*0.8mm*7+0.7mm*0.4mm*6 = 7.95mm2 = 12.32mm2 TOLL: Much big
Slide 8: Possibility of optical inspection
Possibility of optical inspection The TO-LeadLess packages enables a visual inspection due to Tin plated grooved leads Trapezoid Groove guaranteed wetting Visible solder joint Pin of TO-LeadLess Groove Tracks onPCB PCB
Slide 9: When do we recommend TO-Leadless & why?
When do we recommend TO-Leadless & why? high current applications thermal which require best thermal behavior behavior when space reduction in the space application is required applications which require efficiency highest efficiency and best EMI behavior
Slide 10: TO-Leadless a perfect combination of low package area and thermal resistance
TO-Leadless a perfect combination of low package area and thermal resistance thermal behavior Hotter 2.0 space Thermal Resitance (K/W) S3O8 DPAK 1.5 1.0 CanPAK™ S/M SuperSO8 D²PAK 7pin 0.5 D²PAK TO-220 Cooler TO-Leadless Smaller Larger 25 50 100 150 200 250 300 350 Package Area (mm²)
Slide 11: TO-LeadLess offering lowest RDS(on)
TO-LeadLess offering lowest RDS(on) efficiency TO-LeadLess D²PAK 7pin For the first time offering outstanding low RDS(on)
Slide 12: TO-LeadLess portfolio
TO-LeadLess portfolio Package Type VDS [V] RDS(on) max [mΩ] IPT004N03L 30 0.04 IPT007N06N 60 0.7 IPT020N10N3 100 2.0 IPT059N15N3 150 5.9
Slide 13: Summary: Why TO-LeadLess?
Summary Why TO-LeadLess? A leadless package with 60% space reduction Highest current capability: up to 300A Very low RDS(on) – up to 30% lower RDS(on) Enables a visual inspection due to Tin plated grooved leads Better EMI due to reduced parasitic inductances (cut by half) High reliabilit
Slide 14: If you have any further questions…
If you have any further questions… Further information you find on our homepage: www.infineon.com/toll
Slide 15: Infineon
Cinfineon Innovative semiconductor solutions for energy efficiency, mobility and security.
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