Slide 1: Leading at the edge of Moore's Law with Intel Custom Foundry
Leading at the edge of Moore’s Law with Intel Custom Foundry Sunit Rikhi General Manager, Intel Custom Foundry Vice President, Technology and Manufacturing Group SPCS011
Slide 2: Agenda
Agenda • Overview • Platform Offerings • Summary 2
Slide 3: Intel Custom Foundry: Flexible Business Models
Intel Custom Foundry: Flexible Business Models 3
Slide 4: Intel Custom Foundry: Flexible Business Models
Intel Custom Foundry: Flexible Business Models Customer Intel and Custom Design Third Party IP Product 4
Slide 5: Intel Custom Foundry: Flexible Business Models
Intel Custom Foundry: Flexible Business Models Customer Intel and Custom Design Third Party IP Product Intel Standard Customer and Semi-Custom Product Design Third Party IP Product 5
Slide 6: Intel Custom Foundry: Flexible Execution Models
Intel Custom Foundry: Flexible Execution Models Front-end Physical Wafer Packaging Masks Design Design Manufacturing and Test Delivering value beyond a traditional foundry model 6
Slide 7: Intel Custom Foundry: Flexible Execution Models
Intel Custom Foundry: Flexible Execution Models Front-end Physical Wafer Packaging Masks Design Design Manufacturing and Test Customer Owned Tooling (COT) Delivering value beyond a traditional foundry model 7
Slide 8: Intel Custom Foundry: Flexible Execution Models
Intel Custom Foundry: Flexible Execution Models Front-end Physical Wafer Packaging Masks Design Design Manufacturing and Test Customer Owned Tooling (COT) Full Service (ASIC) Delivering value beyond a traditional foundry model 8
Slide 9: Business & Execution Models Matrix
Business & Execution Models Matrix Custom Semi-Custom Product Product Customer Owned Tooling Full Service (ASIC Model) 9
Slide 10: Intel Custom Foundry: Design Ecosystem
Intel Custom Foundry: Design Ecosystem Design Services Soft IP Advanced IP Foundation IP Design Tools & Flows 10 Note: Logos in alphabetical order..
Slide 11: Intel Custom Foundry: Worldwide Assets
Intel Custom Foundry: Worldwide Assets 11 7
Slide 12: Intel Custom Foundry: Worldwide Assets
Intel Custom Foundry: Worldwide Assets Oregon Ireland Dalian Israel Arizona New Mexico Wafer Fabs 12 7
Slide 13: Intel Custom Foundry: Worldwide Assets
Intel Custom Foundry: Worldwide Assets Oregon Ireland Dalian Israel Arizona New Mexico Chengdu Vietnam Costa Rica Penang Kulim Wafer Fabs Assembly/Test 13 7
Slide 14: Intel Custom Foundry: Worldwide Assets
Intel Custom Foundry: Worldwide Assets Oregon Ireland Toronto Dalian California Israel Arizona New Mexico Chengdu Vietnam Costa Rica Bangalore Penang Kulim Wafer Fabs Assembly/Test Foundry Platform Dev & Support 14 7
Slide 15: Intel Custom Foundry: Announced Customers
Intel Custom Foundry: Announced Customers 15 Note: This list of customers does not include those who choose not to disclose relationship with Intel Custom Foundry. Logos are in alphabetical order.
Slide 16: Agenda
Agenda • Overview • Platform Offerings • Summary 16
Slide 17: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings 17
Slide 18: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Technology Platform Silicon Package Test 18
Slide 19: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Design Design Platform Kits IP Services Technology Platform Silicon Package Test 19
Slide 20: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 20
Slide 21: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 21
Slide 22: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 22
Slide 23: The Wide Moving Edge of Moore's Law
The Wide Moving Edge of Moore’s Law 65 nm 45 nm 32 nm 22 nm 14 nm Server 1x Computing Lower Leakage Power Client 0.1x Computing 0.01x Mobile Computing 0.001x Mobile Always-On Circuits Higher Transistor Performance (switching speed) Delivering performance/watt improvement to a wide range of products
Slide 24: Intel Custom Foundry: Silicon Technology Platform Offerings
Intel Custom Foundry: Silicon Technology Platform Offerings 22nm 14nm 10nm General General General Cloud/Infrastructure Purpose Purpose Purpose In Dev Client/Consumer Low Power Low Power In Dev 24
Slide 25: SOC Features in 14nm technology
SOC Features in 14nm technology High Q Inductors High Density MIMCAP Precision Resistors RF Transistors Low Leakage, Long L Transistors High Voltage I/O Transistors Si Substrate Full featured technology enables integration of system functions on a chip 25
Slide 26: Cost per Transistor
Cost per Transistor $ / mm2 mm2 / Transistor $ / Transistor (normalized) (normalized) (normalized) 100 1 1 10 0.1 0.1 1 0.01 0.01 130 nm 32 nm 130 nm 90 nm 14 nm 130 nm 22 nm 90 nm 65 nm 45 nm 22 nm 14 nm 10 nm 65 nm 45 nm 32 nm 22 nm 10 nm 90 nm 65 nm 45 nm 32 nm 14 nm 10 nm Intel 14 nm continues t
Slide 27: Confident Pursuit of Future Technology
Confident Pursuit Graphene III-V Materials Synthesis Future Expect EUV 3-D More Technology From Options Interconnects Nanowires Moore Dense Memory Photonics Future options subject to change Source: Intel 27
Slide 28: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 28
Slide 29: Intel's Flip Chip Package Portfolio
Intel’s Flip Chip Package Portfolio Cloud/Infrastructure • Package-on-Package Client • Ultra-thin • Small Form Factor Chip Scale Packages SOC/Consumer Serving the requirements of multiple market segments 29
Slide 30: Intel's Flip Chip Package Portfolio
Intel’s Flip Chip Package Portfolio • Thin Core Substrate • Multi-chip packages Cloud/Infrastructure • Enhanced thermal • Embedded and solutions • LGA socket surface passives Client Desktop Mobile SOC/Consumer Serving the requirements of multiple market segments 30
Slide 31: Intel's Flip Chip Package Portfolio
Intel’s Flip Chip Package Portfolio Cloud/Infrastructure Server HPC • High pin count LGA sockets • Very High pin count LGA • Optimized for high speed sockets Client signaling • Very large footprint BGA • Large die • Reticle size die assembly SOC/Consumer Serving the requirements of multiple market s
Slide 32: Introducing: Embedded Multi-die Interconnect Bridge (EMIB)
Introducing: Embedded Multi-die Interconnect Bridge (EMIB) Die 2 Die 1 Die 3 FCBGA Substrate W/ EMIB An elegant approach to in-package high density interconnect of heterogeneous die 32
Slide 33: EMIB Wafer Process Compared to Typical 2.5D
EMIB Wafer Process Compared to Typical 2.5D Typical 2.5D Interposer Process EMIB Bridge Wafer Process Starting Wafer Starting Wafer TSV Formation & Fill Not Required! BEOL Metallization Wafer Thinning TSV Reveal & Not Required! Backside Surface EMIB wafer fabrication is simpler than typical silicon
Slide 34: EMIB Assembly Process Compared to Typical 2.5D
EMIB Assembly Process Compared to Typical 2.5D Typical 2.5D Interposer Process Flow EMIB Process Flow Die 2 Die 1 Die 3 Assembly A Die 2 Die 1 Die 3 Assembly B Assembly EMIB Requires Less Assembly Processing Than typical Silicon Interposer Assembly 34
Slide 35: EMIB Assembly Process Compared to Typical 2.5D
EMIB Assembly Process Compared to Typical 2.5D Typical 2.5D Interposer Process Flow EMIB Process Flow Die 2 Die 1 Die 3 Die 2 Die 1 Die 3 Assembly EMIB Requires Less Assembly Processing Than typical Silicon Interposer Assembly 35
Slide 36: EMIB Assembly Process Compared to Typical 2.5D
EMIB Assembly Process Compared to Typical 2.5D Typical 2.5D Interposer Process Flow EMIB Process Flow Die 2 Die 1 Die 3 Die 2 Die 1 Die 3 EMIB Requires Less Assembly Processing Than typical Silicon Interposer Assembly 36
Slide 37: EMIB Progress
EMIB Progress Die 2 Die 1 EMIB Package (Cross Section) Available for sampling in 2015 37
Slide 38: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 38
Slide 39: Introducing High Density Modular Test (HDMT)
Introducing High Density Modular Test (HDMT) Engineering Module Production Module • Common Architecture - Fast TTM Engineering Module - >30 sites with parallel, asynchronous operation in production module • Flexible Architecture - Enables standard instrumentation integration (PXI) • Low Cost - > 2X
Slide 40: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 40
Slide 41: Foundry Design Kit (FDK)
Foundry Design Kit (FDK) Analog / Mixed Signal Flows Design Tool Drivers: Technology files Digital Flows DFM Templates: Device, Layout, Fill Primitive Libraries Design Rules: Run-sets LVS1, DRC2, RV3 Models: Simulation and RC4 Extraction Process Collaterals 41 1 Layout connectivity verification syst
Slide 42: Foundry Design Kit (FDK)
Foundry Design Kit (FDK) Analog / Mixed Signal Flows Full Chip Integration Collateral Library Digital Flows Memory (SRAM1) Cell Library Analog Primitive Library2 Primitive Libraries Process Collaterals 42 1 Static Random Access Memory 2 Capacitors, resistors, inductors, etc.
Slide 43: Foundry Design Kit (FDK)
Foundry Design Kit (FDK) Analog / Mixed Signal Flows Logic Synthesis Floor Planning / Place & Route Digital Flows Design for Test / Test Pattern Generation Timing and Noise Analysis Primitive Libraries Physical Verification Reliability Verification: EM1/SH2/IR3 Drop RC4 Extraction Process Collateral
Slide 44: Foundry Design Kit (FDK)
Foundry Design Kit (FDK) Analog / Mixed Signal Flows Schematic Capture Digital Flows Circuit Simulation Custom Routing Custom Layout Libraries Physical Verification Reliability Verification: EM1/SH2/IR3 Drop RC4 Extraction Process Collaterals Design for Manufacturing: Fill 44 1 Electro-migration 2 S
Slide 45: FDK: Digital Flows Breadth of Industry Standard Tools
FDK: Digital Flows Breadth of Industry Standard Tools Logic Synthesis Floor Planning / Place & Route Test Pattern Generation Timing and Noise Analysis Physical Verification Reliability Verification RC1 Extraction Design for Manufacturing: Fill 45 1 Resistance * Capacitance
Slide 46: FDK: Analog Mixed Signal Flows Breadth of Industry Standard Tools
FDK: Analog Mixed Signal Flows Breadth of Industry Standard Tools Schematic Capture Circuit Simulation Custom Routing Custom Layout Physical Verification Reliability Verification RC1 Extraction Design for Manufacturing: Fill 46 1 Resistance * Capacitance
Slide 47: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 47
Slide 48: IP Offerings: Foundational IP
IP Offerings: Foundational IP Processor IP Register File Compilers Interface IP SRAM Compilers TCAMs Compilers Advanced Mixed High Speed Lib ROMs Signal IP High Density Lib Fuses (High density/High Speed) Foundational Foundational IP Foundational Memory Digital Libraries 48
Slide 49: IP Offerings: Advanced Mixed Signal IP
IP Offerings: Advanced Mixed Signal IP Phase Locked Loop/Delay Locked Loop Processor IP Low Drop Out voltage Regulator Crystal Oscillator Adaptive Voltage Scaling circuits Interface IP Clock Receiver & Divider Digital Thermal Sensor General Purpose IO Advanced Mixed High Speed Programmable IO Signal
Slide 50: IP Offerings: Interface IP
IP Offerings: Interface IP Processor IP Interface IP Memory SerDes Storage Display DDR2/3 USB2/3 eMMC4/5 eDP/DP Advanced Mixed DDR4 PCI Express* 1-4 SD3.0 HDMI1.4/2.0 Signal IP LPDDR3/4 Ethernet2 HBM1 MIPI (DPHY, HSI) WIO1 LP 1-12.5G3 Foundational IP CEI/IEEE 25-32G CEI/IEEE 40-56G1 50 1. Roadmap it
Slide 51: IP Offerings: Processor IP
IP Offerings: Processor IP Processor IP Intel® Architecture Cores Intel® Atom™ processor1 Interface IP Advanced Mixed Signal IP Foundational IP 51 1 Roadmap item in planning and development
Slide 52: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 52
Slide 53: ASIC Design Enablement & Services
ASIC Design Enablement & Services Prototyping Shuttle Support Block Level physical implementation for COT business model Full Chip physical implementation for ASIC business model Design Implementation 53
Slide 54: ASIC Design Enablement & Services
ASIC Design Enablement & Services Customer bring-up / Training Prototyping Shuttle Optimized reference methodology and flows Common debug environment Support Design Implementation 54
Slide 55: ASIC Design Enablement & Services
ASIC Design Enablement & Services Prototyping Shuttle From GDS to Prototype units Support Coming Soon Design Implementation 22nm 14nm 10nm 55
Slide 56: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 56
Slide 57: Engineering Services
Engineering Services One-stop comprehensive engineering services Failure Package Wafer and Product Analysis & Engineering Design Final Test Qualification Debug Samples Service Service Service Service • Leading edge technology capabilities • Integrated engineering data network Faster Time to Producti
Slide 58: Example: Post Silicon Debug – Fabless Industry Model
Example: Post Silicon Debug – Fabless Industry Model FAB/Sort Assembly Test Lab Failure detection, Analysis and Resolution Customer 58
Slide 59: Example: Post Silicon Debug with Intel Custom Foundry
Example: Post Silicon Debug with Intel Custom Foundry FAB/Sort Assembly Test Lab Integrated Engineering Data Network One-stop Engineering Services Customer 59
Slide 60: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 60
Slide 61: Production Services
Production Services Integrated Supply Chain Mark, Wafer Wafer Assembly Advanced Burn-in Final Test Pack, & MFG Test MFG Logistics Label • Manufacturing scale and business continuity • Integrated quality management • Yield optimization 61
Slide 62: Intel Custom Foundry Platform Offerings
Intel Custom Foundry Platform Offerings Online Service Platform Information Exchange Service Transactions Manufacturing Platform Engineering Services Production Services Design Design Platform Kits IP Services Technology Platform Silicon Package Test 62
Slide 63: Online Services Platform
Online Services Platform Customers Ecosystem Partners Online Services Portal Information Exchange Service Transactions Service Transactions • Design kits/IP exchange • Tapeout services • Documentation access • Shuttle services • Design data upload • Material tracking & control • Mfg data download •
Slide 64: Agenda
Agenda • Overview • Platform Offerings • Summary 64
Slide 65: Summary
Summary IDF14
Slide 66: Summary
Summary • Intel Custom Foundry is open for business. We support a full range of flexible custom and semi-custom service business models. 66
Slide 67: Summary
Summary • Intel Custom Foundry is open for business. We support a full range of flexible custom and semi-custom service business models. • Our customers have access to co-optimized advanced manufacturing technologies including silicon, packaging and test. 67
Slide 68: Summary
Summary • Intel Custom Foundry is open for business. We support a full range of flexible custom and semi-custom service business models. • Our customers have access to co-optimized advanced manufacturing technologies including silicon, packaging and test. • To enable customer designs, our design pla
Slide 69: Summary
Summary • Intel Custom Foundry is open for business. We support a full range of flexible custom and semi-custom service business models. • Our customers have access to co-optimized advanced manufacturing technologies including silicon, packaging and test. • To enable customer designs, our design pla
Slide 70: Come lead with us at the edge of Moore's Law
Come lead with us at the edge of Moore’s Law 70
Slide 71: Additional Sources of Information
Additional Sources of Information • A PDF of this presentation is available is available from our Technical Session Catalog: www.intel.com/idfsessionsSF. This URL is also printed on the top of Session Agenda Pages in the Pocket Guide. • Sunit Rikhi’s presentation at Intel Analyst Event in London (Ma
Slide 72: Legal Disclaimer
Legal Disclaimer INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS AND/OR SERVICES. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN AN EXECUTED AGREEMENT, INTEL ASSUMES NO LIABIL
Slide 73: Risk Factors
Risk Factors The above statements and any others in this document that refer to plans and expectations for the second quarter, the year and the future are forward-looking statements that involve a number of risks and uncertainties. Words such as “anticipates,” “expects,” “intends,” “plans,” “believe