Slide 1: Enabling AI Silicon Solutions for Next Generation Data Infrastructure
Enabling AI Silicon Solutions for Next Generation Data Infrastructure Igor Arsovski, CTO, ASIC Business Unit September 29, 2020
Slide 2: Custom AI silicon needed for data infrastructure
Industry trend: Custom AI silicon needed for data infrastructure Standard products Custom silicon efforts (ASICs) Flexibility/ease of use CPU IO TPU1, TPU2,TPU3 … Graviton, Inferentia, Nitro IO FPGA FPGA AI training and Inference AI Inference 100X improvement in TOPS and TOPS/W (CPU to GPU/FPGA to A
Slide 3: Growing AI models to silicon scaling gap
Industry trend: Growing AI models to silicon scaling gap AI model growth Moore’s law scaling (transistors/die) th s TNG th s 17B on Graphcore on A100 MK2 8 m m 54B 59B n1 12 0 xi n 50 xi Megatron 50 8.3B GPT-2 BERT-Large 1.5B 340M IBM Power 7 1.2B Rosset,MSFT 07/2018 01/2020 2010 2020 AI models doub
Slide 4: Marvell ASIC Introduction
Marvell ASIC Introduction ® Established ASIC business - spanning 14 process nodes Leading-edge Design Advanced IPs Services Packaging Technologies Over 2000 designs with record first pass successes © 2020 Marvell. All rights reserved. 4
Slide 5: Marvell offers the best of breed
N7 N5 N7 N5 Leading-edge Best in class IO Marvell offers Highest performance technology 112G and parallel IOs the best of breed Highest Advanced bandwidth packaging SRAM Modular MCMs +50-90% performance 2.5D 3D High density SRAM © 2020 Marvell. All rights reserved. 5
Slide 6: Flexible custom ASIC engagement business models
Flexible custom ASIC engagement business models COPD Standard Hybrid Turnkey RTL Netlist Place Layout Customer Marvell Close collaboration from design architecture start to tapeout release © 2020 Marvell. All rights reserved. 6
Slide 7: Marvell enables Groq's 1st PetaOPs AI accelerator
Marvell enables Groq’s 1st PetaOPs AI accelerator First-time-right 700+mm2 custom ASIC in volume production Groq architectural innovations: High-performance and low latency Multi-chip scalability with deterministic execution Best-in-class Marvell IPs: High-speed SerDes Dense SRAM Full turnkey PCIe &
Slide 8: Enabling custom data infrastructure silicon solutions
Enabling custom 5G Carriers Enterprise Networking data infrastructure silicon solutions Data Centers Automotive © 2020 Marvell. All rights reserved. 8
Slide 9: Marvell offers the most complete data infrastructure portfolio
Processors Storage Marvell offers #1 in baseband and data plane processors #1 in HDD, SSD and Fibre Channel controllers the most complete data infrastructure portfolio Networking Security #2 in Switches and PHYs #1 in security processors © 2020 Marvell. All rights reserved. 9
Slide 10: Custom silicon for data centers
Custom silicon for data centers Building blocks Custom silicon Optimized 112G+ SerDes / HBM Machine learning optimized memory On package memory High-perf. custom Programmable ARM processors Logic AI accelerators Switch / Routing IP Chiplet Encryption / Decryption Based Accelerators Compression/Decom
Slide 11: Custom silicon for computational storage
Custom silicon for computational storage Building blocks Custom silicon NAND Media Controller LPDDR DSP and LDPC ECC CPU DDR PCIe or Encryption / Data Protection On package NVMe AI / ML memory SCM High-performance Computational SSD custom ARM Programmable Logic processors Chiplet based DDR Ser or CX
Slide 12: Custom silicon for automotive
Custom silicon for automotive Building blocks Custom silicon Autonomous drive Automotive storage Multi-core AI Secure PHY / Switch / CNTLs Arm & accelerator NVMe NVMeOF security ASIC NVMe / NVMeOF On package B I B B A B High-performance memory A I B A multi-core ARM Security IP A B G G G processors
Slide 13: Proactive measures to maintain reliability & availability
Proactive measures to maintain reliability & availability FAB & OSAT partnerships Deep understanding of technology intrinsic failure mechanisms Design for reliability IP design methodology Pre-qualified internal and 3rd party IP Chip design methodology Pre-qualified chip design methodology Image/pac
Slide 14: Summary: Marvell's unique custom silicon offering
Summary: Marvell’s unique custom silicon offering 1 Industry’s only complete data infrastructure IP portfolio 2 25-year custom ASIC track record of execution with >2000 high-reliability production ASICs Shipping multiple AI/ML ASICs including PetaOP/s accelerators 3 Scaling to advanced technology no
Slide 15: Thank You
Thank You
Slide 16: Marvell - Essential technology, done right
ia MARVELL Essential technology, done right™