26 slides from Be Semiconductor Industries's technical presentation, Mar 14, 2022
Slide 1: Besi Hybrid Bonding Presentation
Besi Hybrid Bonding Presentation March 2022
Slide 2: Safe Harbor Statement
Safe Harbor Statement This presentation contains statements about management's future expectations, plans and prospects of our business that constitute forward-looking statements, which are found in various places throughout the press release, including, but not limited to, statements relating to ex
Slide 3: Agenda
Agenda Overview Richard Blickman, CEO Hybrid Bonding Opportunity Ruurd Boomsma, CTO Q&A March 14, 2022 3
Slide 4: Summary
Summary Semiconductor assembly has moved from individual chip component circuitry to integration on chip level via hybrid bonding. Gating item for semiconductor development Hybrid bonding adoption has become most critical element to increasing circuitry speed and further reducing cost Has pote
Slide 5: Besi's Hybrid Die Bonding Progress
Besi’s Hybrid Die Bonding Progress Status Today • Initial proof-of-concept orders received in Spring 2021 • Additional orders received in both Q2 and Q3-21 for delivery in H1-22 • Shipments Commenced in Q4-21 • Cluster tools available in Q2-22 to help support volume production • Multiple customer en
Slide 6: Agenda
Agenda Overview Richard Blickman, CEO Hybrid Bonding Opportunity Ruurd Boomsma, CTO Q&A March 14, 2022 6
Slide 7: Semiconductor Value Chain
Semiconductor Value Chain FRONT-END ASSEMBLY (BACK-END) PCB END PRODUCT CREATING ELECTRONIC MOUNTING COMPONENTS ALMOST ALL PRODUCTS DEVICE ON SILICON WAFER EQUIPMENT TO CONNECTING BASED ON OR CONTAIN FROM SIMPLE DIODE PLACE DIES ON CARRIER ELECTRONIC DEVICES TO HIGHLY COMPLEX ICs CONNECT TO OUTSIDE
Slide 8: Advanced Packaging Critical to Next Generation Applications
Advanced Packaging Critical to Next Generation Applications Growth Drivers Enablers Greater Mobile Revolution miniaturization • Mobile internet • Messaging • Social media Higher Greater • Shared economy accuracy complexity • Gaming • Geo-location • Audio/video Die Bonding and • Auto electronics Pack
Slide 9: Growth in Advanced Packaging Will Continue as Gateway to Improved Performance
Growth in Advanced Packaging Will Continue as Gateway to Realizing Improved Performance in Next Gen Applications Advancements in New Computing Methods New Packaging Methods: Real 3D Device Coupling Miniaturization Chiplets / 2.5 D Stacking With Die Stacking SMALLER DEVICES ARE FASTER AND REQUIRE LES
Slide 10: Extension of Moore's Law Requires Advanced Packaging Innovation
Extension of Moore’s Law Requires Advanced Packaging Innovation March 14, 2022 10
Slide 11: Moore's Law Helps Drive Growth of Wafer Level Assembly
Moore’s Law Helps Drive Growth of Wafer Level Assembly Wire Bond Flip Chip TCB Bonding HD Fan Out Hybrid Bonding (1975) (1995) (2012) (2015) (2018) Heat compression force Architecture Contact Type Solder ball or copper Wire pillar Copper pillar RDL or copper pillar Copper to copper Contact Density 5
Slide 12: Understanding Hybrid Bonding
Understanding Hybrid Bonding 1 Preparation Die to Wafer and Die to Die Bonding of Chiplets - CMP Polishing - Very flat < 5nm and clean - Surface Activation BUMPLESS INTERCONNECT - Very Clean 2 Bonding - Accurate Placement - Cold Bond - Based on initial dielectric bond 3 Cu-Cu Bonding via Anneal - Co
Slide 13: Merges Front-End/Back-End Processes
Merges Front-End/Back-End Processes Requiring Much Smaller Dimensions Requiring Much Higher Precision Requiring Higher Levels of Cleanliness Comparable to Front-End Reducing cost/contact Align Contacts Typical 10% Max Which Drives Upwards ASP Very Precisely Deviation of contact size In X and Y 1 um
Slide 14: Many Front-End and Assembly Process Steps Involved in Clean Room Environment
Many Front-End and Assembly Process Steps Involved in Clean Room Environment Copper quality Impact of oxide CMP Dicing Cleaning Plasma and fill depostion and Dishing Cleanliness Parameters Activation Parameters Optimized Bonding Integrated Anneal Electrical Life Time Bonding Process Process Flow Geo
Slide 15: Hybrid Bonding is a Game Changer for Increasing Contact Density
Hybrid Bonding is a Game Changer for Increasing Contact Density MORE DATA =>MORE CONTACTS Contacts Per mm2 Contact Density at Different Contact Pitches 1’000’000 100’000 10’000 1’000 100 Hybrid TCB uBump Flip Chip C4 10 Bumpless 1 0 20 40 60 80 100 Pitch in um Source: Intel March 14, 2022 15
Slide 16: Requires More Process Steps Resulting in Higher Assembly Capital Intensity
Requires More Process Steps Resulting in Higher Assembly Capital Intensity Hybrid Bonding Adoption Will Generate Additional Demand For Assembly Equipment LOGIC MEMORY Example: COWOS TYPE STRUCTURE CASE 1 => HYBRID MAY REPLACE 1 TO 1 TCB Current Design With Hybrid Bonding 3 BONDING STEPS 5 BONDING ST
Slide 17: Now on Agenda of All Big Players
Now on Agenda of All Big Players Source: TSMC, AMD presentations Source: Intel Archtecture Day 2020 Source: Samsung presentations March 14, 2022 17
Slide 18: Chiplet Based System With Hybrid Connections is Next Step
Chiplet Based System With Hybrid Connections is Next Step March 14, 2022 18
Slide 19: Enabling New Integration Schemes
Enabling New Integration Schemes Source: AMD March 14, 2022 19
Slide 20: Hybrid Bonding Adoption Leads to Higher Capital Intensity per UPH
Hybrid Bonding Adoption Leads to Higher Capital Intensity per UPH 8800 FC Quantum 8800 Ultra Accurate Chip to Wafer Hybrid Bonder 3 micron accuracy <200 nanometer accuracy Pricing: $1.5MM-2.5MM ASP: $500k Configuration dependent ~9,000uph ~1,500uph March 14, 2022 20
Slide 21: Status Update: Besi/AMAT Development Cooperation
Status Update: Besi/AMAT Development Cooperation SYSTEM IMPROVEMENTS JOINT DEVELOPMENT COOPERATION SUBSTANTIAL INVESTMENT IN CLEAN ROOM AMAT AND BESI INFRASTRUCTURE, MEASUREMENT EQUIPMENT, REACHING 122nm ACCURACY AND PEOPLE OUTPUT UP TO 2,000 UPH ANNOUNCED OCTOBER 2020 Front and Back-End Process E
Slide 22: Estimated Timetable for Hybrid Bonding Applications
Estimated Timetable for Hybrid Bonding Applications 2022 2023 2024 2025 2026 2027 2028 Computing Consumer Servers Datacenters Memory/Mobile PC High performance Laptop Auto/Industrial computing High bandwidth memory Gaming High-end smartphone Artificial Intelligence Autonomous driving Entertainment S
Slide 23: Hybrid Die Bonding Market Update
Hybrid Die Bonding Market Update Market tracking above high case June 2020 estimate developed in June 2020 • High level of customer engagement • Significant interest expressed by both logic and memory players • Collaboration with AMAT enhances market position • AMD first to announce hybrid bonded 3D
Slide 24: Chiplet Adoption Enables Cost Effective Means of Increasing Performance
Chiplet Adoption Enables Cost Effective Means of Increasing Performance Chiplet Adoption Also Increases Assembly Capital Intensity For many years the most direct way to improve capacity and performance was to increase wafer size and design by using smaller devices with more transistors/mm2 5 nm node
Slide 25: Besi Wafer Level Assembly Portfolio Supports Multiple 3D Technologies
Besi Wafer Level Assembly Portfolio Supports Multiple 3D Technologies 2 3 3D Chiplet 5 1 Chiplet Chiplet Hybrid Bond Bridge Die Interposer 6 4 Bridge die Package Substrate 1 2 3 4 5 6 Chip to Wafer TCB Hybrid Bonding High Bandwidth Embedded Bridge Wafer Level HD Interposer to Memory Stacking Die Att
Slide 26: Agenda
Agenda Overview Richard Blickman, CEO Hybrid Bonding Opportunity Ruurd Boomsma, CTO Q&A March 14, 2022 26