Nordamps Ab · OMXSTO:NRDAMP
Nordamps Ab — Swedish Microwave Days 2023
16 slides from Nordamps Ab's conference presentation, May 23, 2023
Slide 1: D-band LNA in Vertical III-V Nanowire Technology
Swedish Microwave Days 2023 D-band LNA in Vertical III-V Nanowire Technology May 23-25, 2023 Tobias Tired, NordAmps AB, Lund Lomma. Analog & RF Consulting
Slide 2: Why D-band?
Why D-band ? https://www.h2020-dragon.eu/overview/ Ericsson review, Microwave backhaul evolution – reaching beyond 100GHz, 2017
Slide 3: Semiconductor Technology
Semiconductor Technology • Vertical structure low parasitics to substrate • Simple manufacturing technology • Higher mobility than Si • Semi ballistic
Slide 4: 3D-printed device models
3D-printed device models • LNA type device. Input device with: - 296 wires in parallel (black) - 8 fingers to reduce Rg (orange) - Drain fingers (white) to reduce parasitic capacitance - InAs mesa source layer (grey) • Single wire device cut in half
Slide 5: Device model
Device model • Virtual source model (from MIT) - Semi-empirical model for quasi-ballistic transistors - Few physical parameters - Extrapolated from validated devices at Lg=120nm with fT/fmax=123/130 GHz - This work: fT/fmax=285/418 GHz for Lg=20nm • Virtual-source point x0:carrier charge and density
Slide 6: Device model with parasitics and noise sources
Device model with parasitics and noise sources 𝐶𝑔𝑑,𝑝 𝑖ഥ2𝑔 = 𝑖ഥ2 𝑡ℎ 𝑖ഥ2 𝑑 = 𝑖ഥ2 𝑡ℎ 𝑔𝑔𝑑,𝑝 G 𝑦𝑔𝑑 𝑅𝑗 𝑅𝑑 D 𝑅𝑔 + 𝑦𝑔𝑠 𝑉𝑔𝑠 ′ 𝑔𝑑𝑠,𝑝 𝐶𝑑𝑠,𝑝 𝐶𝑔𝑠,𝑝 𝑔𝑔𝑠,𝑝 - 𝑔𝑚 𝑉𝑔𝑠 ′ 𝑅𝑖 𝑖ഥ2 𝑡ℎ = 4𝑘BTGx 𝑖ഥ2 𝑐ℎ = 𝑖ഥ2 𝑠ℎ,𝑠 + 𝑖ഥ2𝑓 𝑖ഥ2 𝑠ℎ = 2qI, shot noise 𝑅𝑠 𝑖ഥ2…
Slide 7: Device model-NFmin
Device model-NFmin • NFmin vs frequency for Id=9.3 mA (input stage, NW=296, NF=8) • NFmin vs Id for f=50 and 150 GHz
Slide 8: Technology benchmark-NFmin @ 50 GHz
Technology benchmark-NFmin @ 50 GHz NordAmps 20 418 0.6 0.8 R Ericsson review, Microwave backhaul evolution – reaching beyond 100GHz, 2017
Slide 9: Rotational symmetric FEM structure: Current density
Rotational symmetric FEM structure: Current density Drain metal inGaAs shell InGaAs drain Drain metal InGaAs channel [µm] Dielectric Gate metal inGaAs shell InAs source [µm]
Slide 10: FEM: Silvaco Blaze output characteristics
FEM: Silvaco Blaze output characteristics Id (A) • Map FEM model to measurements and compact model (on-current 40 µA) Vds (V)
Slide 11: Device optimization with VerilogA compact model
Device optimization with VerilogA compact model • Starting point: NW=300 wires NF=6 fingers Lg=25nm fT= 272 GHz and fmax= 384 GHz • Simulate sensitivity in maximum fT/fmax vs Id for 11 model parameters • Highest sens. for Cgd Process optimization
Slide 12: Process Design Kit (PDK)
Process Design Kit (PDK) • PDK in Cadence - VerilogA model code - Parasitic extraction in Quantus - Electromagnetic simulations in EMX - Fast convergence, both in Periodic Steady State and Harmonic Balance • Scalable P-cells • Model code also for Microwave Office -N-type transistor (AWR) - MIM- capa
Slide 13: Back End of Line (BEOL)
Back End of Line (BEOL) • 0.5µm Au with BCB dielectric r=2.65 • 4.2 µm to ground plane
Slide 14: 3-stage LNA design
3-stage LNA design VCC=1.2 V VCC ICC=9.3mA ICC=6.4mA ICC=11mA /4 biasCG1 biasCG2 Output RF_out Input Interstage Interstage match match match match /4 /4 /4 biasCS0 biasCS1 biasCS2
Slide 15: Simulation results 3-stage LNA
Simulation results 3-stage LNA • S21=20.8 dB@147 GHz NF=4.8 dB@149 GHz Broadband S11 • Low gain @ 175 GHz NF increase • Compression point and linearity: ICP1dB=-21 dBm @ 146 GHz IIP3=-11 dBm for two tones @146 and 147 GHz.
Slide 16: Conclusions
Conclusions D-band LNA in Vertical III-V Nanowire Technology • Compact model + Cadence PDK • Predictive modeling close to commercial NF performance @ lower D-band frequencies • III-V technology with fT/fmax=fT/fmax= 285/418 GHz • Minimum NF=4.8 dB @ 149 GHz • Further process optimization Increased c