Applied Materials, Inc. · NASDAQ:AMAT
Applied Materials — SEMICON West 2023 Technology Breakfast
49 slides from Applied Materials's conference presentation, 2023
Slide 1: | Applied Materials External
| Applied Materials External
Slide 2: Forward-Looking Statements and Other Information
Forward-Looking Statements and Other Information This presentation contains forward-looking statements, including those regarding anticipated growth and trends in our businesses and markets, industry outlooks and demand drivers, technology transitions, the path to net zero and our environmental goal
Slide 3: Mike Sullivan, Corporate Vice President Investor Relations
Mike Sullivan Corporate Vice President Investor Relations 3 | Applied Materials External
Slide 4: Agenda
AGENDA 7:30 Mike Sullivan Welcome 7:35 Dr. Prabu Raja EPIC™ Opportunities 7:50 Mike Rice Vistara™ and EcoTwin™ Q&A 8:05 Dr. Sundar Ramamurthy Heterogenous Integration (HI) 8:15 Vincent DiCaprio HI Panel 9:00 Adjourn Q&A Mingle 4 | Applied Materials External
Slide 5: SEMICON West 2023 Themes
SEMICON West 2023 Themes 5 | Applied Materials External
Slide 6: $1T Industry Growth Challenges
$1T Industry Growth Challenges College Complexity Cost Collaboration Cadence Grads Carbon 6 | Applied Materials External
Slide 7: Dr. Prabu Raja, President Semiconductor Products Group
Dr. Prabu Raja President Semiconductor Products Group 7 | Applied Materials External
Slide 8: Path to a $1T Semiconductor Industry
Path to a $1T Semiconductor Industry $B 1,200 ERA 4 1,000 IoT + AI 800 600 ERA 3 ~2X Mobility + Cloud 400 ERA 2 PC + Internet ~2X ERA 1 200 Mainframe ~2X 0 Source: SIA, Applied Materials - SMI Each computing era ~doubles size of semiconductor market 8 | Applied Materials External
Slide 9: Internet of Things and Artificial Intelligence Era
Internet of Things and Artificial Intelligence Era TETHERED EDGE BATTERY AI EDGE EDGE COMMUNICATIONS CLOUD DATA DATA CENTER CENTER ICAPS NODES LEADING EDGE 9 | Applied Materials External
Slide 10: Clean Energy Revolution Needs ICAPS and Leading-Edge Silicon
Clean Energy Revolution Needs ICAPS and Leading-Edge Silicon Electric Vehicles Wind and Solar Smart Grid 10 | Applied Materials External
Slide 11: Significant Challenges Across the Semiconductor Industry
Significant Challenges Across the Semiconductor Industry Complexity College Grads 1,000,000: additional skilled workers needed by 2030 100,000: number of graduate students enrolled in electrical engineering and computer science in the U.S. annually Planar FinFET GAA Source: Deloitte Cost Cadence
Slide 12: New Playbook for Innovation and Commercialization
New Playbook for Innovation and Commercialization TM PPACt™ solutions New materials 3D structures Atomic-level precision Connected capabilities System-level innovations New collaboration models Across industry and academia Growing global talent pool Net Zero Energy efficient semicond
Slide 13: Key Playbook Elements
Key Playbook Elements Inclusive innovation to New products for System-level innovations for accelerate commercialization integrated processes PPACt™ acceleration Equipment and processes Flexible, intelligent and sustainable System Technology Co-optimization device validation - EPIC™ Center p
Slide 14: MTC R&D Fab
NEW ™ CURRENT MTC R&D Fab » 180k ft2 of cleanroom + supporting labs » 44k ft2 of cleanroom » Applied, Customer, University and + supporting labs Partner space » Applied only » Operational Q1’26 14 | Applied Materials External
Slide 15: EPIC Center Implementation
EPIC™ Center Implementation FOR CHIPMAKERS AND INDUSTRY PARTNERS SHARED COMMON TOOL SET Co-development and early validation to accelerate new (Metrology, Cleans, Litho, etc.) devices and structures CUSTOMER A PARTNERS New materials CUSTOMER B / PEERS New technologies CUSTOMER C CUSTOMER D UNIVER
Slide 16: New Commercialization Path
New Commercialization Path Commercial Technology Technology Commercial Proof of Equipment Integrated Integrated Chip Idea Concept and Process into Module into Device 5 – 7 YEARS 2 – 3 YEARS 1 – 2 YEARS 1 – 2 YEARS 1 – 2 YEARS Equipment and Module / Foundational Research Pilot HVM Process Development
Slide 17: New EPIC Model
New EPIC™ Model University NEW UNIVERSITY CENTER MODEL A University B ™ University C Customer’s High Volume Equipment and Process Pilot Line Manufacturing University Innovation and Integrated D Commercialization R&D Facilities Center META, APDC, University IMEC, LETI, E Future NSTC Foundational Inno
Slide 18: EPIC University Innovation Network
EPIC™ University Innovation Network University New collaboration models to accelerate NEW UNIVERSITY CENTER MODEL A commercialization of innovations World-class shared R&D and prototyping facilities University B Access to industry partners, startups and government entities ™ Talent development
Slide 19: University Innovation Network: Materials-to-Fab Center
University Innovation Network: Materials-to-Fab Center Press Release 19 | Applied Materials External
Slide 20: Key Playbook Elements
Key Playbook Elements Inclusive innovation to New products for System-level innovations for accelerate commercialization integrated processes PPACt™ acceleration Equipment and processes Flexible, intelligent and sustainable System Technology Co-optimization device validation - EPIC™ Center p
Slide 21: Mike Rice, Corporate Vice President, Semiconductor Products Group
Mike Rice Corporate Vice President, Semiconductor Products Group Applied Materials Fellow 21 | Applied Materials External
Slide 22: A Long History of Successful Platforms
A Long History of Successful Platforms Endura® Centura® Producer® Centris® IMS workhorse for Large-chamber High throughput High throughput small chambers compatibility density for small density for large chambers chambers 1990 1992 1998 2010 2023 22 | Applied Materials External
Slide 23: Significant Challenges Across the Semiconductor Industry
Significant Challenges Across the Semiconductor Industry Complexity College Grads 1,000,000: additional skilled workers needed by 2030 100,000: number of graduate students enrolled in electrical engineering and computer science in the U.S. annually Planar FinFET GAA Source: Deloitte Cost Cadence
Slide 24: Introducing the Applied Vistara Platform
Introducing the Applied Vistara™ Platform Flexibility Intelligence Sustainability 24 | Applied Materials External
Slide 25: Vistara Platform Chamber Flexibility
Vistara™ Platform Chamber Flexibility etch etch dep treatment dep 4 to 12 chambers technologies preclean etch treatment etch partner partner configurations partners partner 25 | Applied Materials External
Slide 26: A Flexible Platform for IMS Connected Capabilities
A Flexible Platform for IMS™ Connected Capabilities Increasing Process Integration Multiple processes in one system, IMS™ under vacuum Co-optimized Adjacent processes Unit Process Single process IMS™ = Integrated Materials Solution® 26 | Applied Materials External
Slide 27: Vistara Platform Intelligence
Vistara™ Platform Intelligence massive data AIX™ Accelerate R&D Speed transfer and matching Maximize output and yield EcoTwin™ Intelligence for sustainability thousands of sensors feed Vistara’s intelligence Accelerating time to market and maximizing ROI and sustainability across the entire
Slide 28: Make Possible a Better Future: 3x30 Goal by 2030
Make Possible a Better Future ™ Sustainability Initiative 3x30 Goal ↓30% Equivalent Energy ↓30% Chemical Consumption ↓30% Cleanroom Area per Wafer by 2030 28 | Applied Materials External
Slide 29: Vistara Platform Energy Savings
Vistara™ Platform Energy Savings Centris® Platform Vistara™ Platform 12 chambers 12 chambers ~35% platform energy savings ~10% system* energy savings * Systems configured for Sym3 Etch chambers 29 | Applied Materials External
Slide 30: Vistara Footprint Savings
Vistara™ Footprint Savings ↑30% throughput density 12-chamber Vistara™ 12 Chambers on Centris® 30 | Applied Materials External
Slide 31: Introducing EcoTwin Eco-Efficiency Software
Introducing EcoTwin™ Eco-Efficiency Software Compare resource consumption of different recipes to optimize sustainability Monitor energy and gases in real-time to assess environmental impact of chambers, platform and sub-fab components Report continuous improvements in environmental performanc
Slide 32: The most flexible IMS-ready platform!
The most flexible IMS-ready platform! Flexibility Intelligence Sustainability ™ 32 | Applied Materials External
Slide 33: Key Playbook Elements
Key Playbook Elements Inclusive innovation to New products for System-level innovations for accelerate commercialization integrated processes PPACt™ acceleration Equipment and processes Flexible, intelligent and sustainable System Technology Co-optimization device validation - EPIC™ Center p
Slide 34: Dr. Sundar Ramamurthy, Group Vice President Heterogenous Integration, ICAPS and Epitaxy
Dr. Sundar Ramamurthy Group Vice President Heterogenous Integration, ICAPS and Epitaxy Semiconductor Products Group 34 | Applied Materials External
Slide 35: Performance Outpacing Power Efficiency
Performance Outpacing Power Efficiency Performance Grows 2x every 1.2 Years Power Efficiency Grows 2x every 2.2 Years [GFLOPs] [GFLOPs/Watt] 10,000,000,000,000 10,000 1,000,000,000,000 100,000,000,000 10,000,000,000 1,000 1,000,000,000 100,000,000 10,000,000 100 1,000,000 100,000 10,000 1,000 10 100
Slide 36: Heterogeneous Integration Reduces Power
Heterogeneous Integration Reduces Power 1 Relative Joules/Bit 0.5 0.25 Heterogeneous Integration 0.05 0.02 Off-package copper Off-package optical On-package 2.5D 3D Source: Adapted from L. Su, ISSCC 2023 36 | Applied Materials External
Slide 37: Heterogeneous Integration Improves PPACt
Heterogeneous Integration Improves PPACt™ Shorter, parallel interconnects Higher bandwidth 50x lower power Lower latency Hybrid bonding vs. PCB Power Lower power chip-to-chip connection Source: Adapted from L. Su, ISSCC 2023 Performance GDDR5 HBM 3D stacking GPU ~3X system Tighter integration perfor
Slide 38: System-Level Integration with 2D and 3D Heterogeneous Integration
System-Level Integration with 2D and 3D Heterogeneous Integration Hybrid Bonding Insepra™ Sym3® Via Ventura® 2 Nokota® Opta® CMP HB TSV Sym3® Via InVia® 2 Ventura® 2 Nokota® Opta® CMP µbump Cu RDL TSV (on polymer) Ventura® 2 Nokota® Source: Li et al., IRPS (2016); Agrawal et al., ECTC (2017); Gao et
Slide 39: New Products Enable Heterogeneous Integration
New Products Enable Heterogeneous Integration Press Release 39 | Applied Materials External
Slide 40: Key Playbook Elements for Heterogenous Integration
Key Playbook Elements for Heterogenous Integration Innovating how New products for System level innovations we innovate integrated processes for PPACt™ acceleration Advanced Packaging Development Center Integrated Materials Solution® for Industry Enablement of for Heterogeneous Integration Die-to-Wa
Slide 41: Vincent DiCaprio, Vice President, Business and Corporate Development
Vincent DiCaprio Vice President, Business and Corporate Development Heterogeneous Integration and ICAPS Semiconductor Products Group 41 | Applied Materials External
Slide 42: Heterogeneous Chip Design – An Evolution of Moore's Law
Heterogeneous Chip Design – An Evolution of Moore’s Law Heterogenous integration “It may prove to be more economical to build large systems out of smaller functions, which are separately packaged and interconnected.” Semiconductor Industry Revenue - Gordon Moore, 1965 Flip-chip ERA 4: AI Wire bondin
Slide 43: Panelists on Heterogeneous Integration
Mark Fuselier Babak Sabi PR “Chidi” Richard Blickman Paul Lindner SVP of Assembly Test Chidambaram SVP of Technology Founder and CEO Executive Technology and Product Engineering Technology Development VP of Engineering Director AMD Intel Qualcomm Besi EV Group 43 | Applied Materials External
Slide 44: Enabling Faster Scale of Compute Capability
Enabling Faster Scale of Compute Capability Cost & Time to Market Memory Integration Heterogenous SoC 2nd/3rd/4th Gen EPYCTM 2.5D GPU with HBM 3D & 2.5D integration Interposer/TSV interconnectivity CPU, GPU & HBM in single Separate I/O chiplet module CPU in latest technology gen 3D S
Slide 45: Evolution of the Heterogeneous Roadmap
Evolution of the Heterogeneous Roadmap Today: Integration augments scaling Tomorrow: Tech node coupled with integration Throughput Logic-on-Logic Backside Power Scaled GAA, (Seq/Mono-3D) GAA, Nanosheet BPR/BSP 2D ch. material 2D ch. material 2023 2024 2028 2030+ Power-constant performance Device lev
Slide 46: Vision of the Future for AI/HPC
Vision of the Future for AI/HPC Advanced packaging enables high density interconnects with larger die complexes from multiple process nodes Hybrid Glass In-Package Bonding Substrates Optics On- and off-package Performance per Core count & uncore Memory partitioning latency in large socket drives mas
Slide 47: Estimated Hybrid Bonding Market Development
Estimated Hybrid Bonding Market Development Cumulative TAM of installed hybrid bonding systems Estimated 800 – 1,900 systems cumulative by 2030 Logic device production and adoption continues 2000 High case Technology adoption coming in waves 1800 Application Hybrid processors Major memory comp
Slide 48: Wafer Bonding is a Scaling Booster
Wafer Bonding is a Scaling Booster EVG®40NT NanoCleave™ Gemini®FB Bond Overlay Cleaving Hybrid Wafer Bonding Metrology Bonding » Complements the traditional dimensional EVG®850 scaling Temporary BONDSCALE® Bonding Active Layer Transfer Wafer-to-Wafer Hybrid Bonding: » Enables higher functional d
Slide 49: Make Possible
Cl Mareniats. make possible
Applied Materials — SEMICON West 2023 Technology Breakfast on 6ix