Silvaco Group, Inc. · NASDAQ:SVCO

Silvaco — Technical Presentation (September 2022)

50 slides from Silvaco's technical presentation, September 2022

  1. Slide 1: Victory RCx Pro RC – Extractor for 3D Structures

    Victory RCx Pro RC – Extractor for 3D Structures Technology-Driven Parasitic Extraction Tool

  2. Slide 2: Applications

    Applications • Victory RCx fits well as an RC extraction tool in the following markets: • Deep submicron CMOS – Realistic 3D back end process simulations and accurate interconnect simulation with user selected tolerance – Accurate via detailed capacitance and process analysis of individual problemat

  3. Slide 3: Benefits

    Benefits • Advanced lithography and realistic etch deposition models are used to create realistic structure • Conductor and Insulator Field Solvers based for high accuracy capacitances and resistances calculation • Accurately solves critical 3D back end process steps (e.g. dual damascene, thin layer

  4. Slide 4: Advantages

    Advantages • No restriction on geometry size – 65nm, 45nm and below • Realistic Structure Generation – suitable for all technologies and arbitrary 3D shapes • Only RC extractor in the industry capable of reproducing the lithographic effects of Optical Proximity Correction (OPC) sub wavelength effect

  5. Slide 5: Advantages (con't)

    Advantages (con’t) • Automatic back annotation of field solved resistances and capacitances onto extracted active device netlist for immediate SPICE analysis • Full 3D field solver engine directly calculates parasitic RC extraction for best accuracy and handle dummies • Automatic grid generation and

  6. Slide 6: Victory RCx Pro – Simulator

    Victory RCx Pro – Simulator Full Chip - SoC Custom Cell Real 3D Process Victory RCx Pro Exact/Hipex- For full chip design GDSII + Real 3D Process Copyright ©2022 Silvaco, Inc. 6

  7. Slide 7: Victory RCx Pro – Simulator

    Victory RCx Pro – Simulator • Simple intuitive Mask Driven process simulation syntax • Easy to learn and use • User friendly input file development and runtime environment Copyright ©2022 Silvaco, Inc. 7

  8. Slide 8: Victory RCx Pro – Layout Driven

    Victory RCx Pro – Layout Driven • 3D structures created from Mask Driven intuitive process commands GDS2 Mask Layout 3D Structure Copyright ©2022 Silvaco, Inc. 8

  9. Slide 9: Victory RCx Pro – Tracking Fronts in Etch/Deposition

    Victory RCx Pro – Tracking Fronts in Etch/Deposition • Victory RCx Pro simulates realistic geometric etch and deposition steps very efficiently with unstructured tetrahedral mesh - the developed algorithm combines the efficiency of string methods and the robustness of Level Set methods A generic mod

  10. Slide 10: Victory RCx Pro – Tracking Fronts in Etch/Deposition

    Victory RCx Pro – Tracking Fronts in Etch/Deposition • Example – creation and refill of a trench structure Patterning of photoresist. Directional etching; rdir is determined by the visible “cone” from above. Copyright ©2022 Silvaco, Inc. 10

  11. Slide 11: Victory RCx Pro – Tracking Fronts in Etch/Deposition

    Victory RCx Pro – Tracking Fronts in Etch/Deposition • Example – creation and refill of a trench structure Trench refill; illustration of Final trench structure with mesh. void creation. Copyright ©2022 Silvaco, Inc. 11

  12. Slide 12: Victory RCx Pro – Tracking Fronts in Etch/Deposition

    Victory RCx Pro – Tracking Fronts in Etch/Deposition • Complex etching capability • Difficult Etch/Deposit Combinations Possible Copyright ©2022 Silvaco, Inc. 12

  13. Slide 13: Victory RCx Pro – Tracking Fronts in Etch/Deposition

    Victory RCx Pro – Tracking Fronts in Etch/Deposition • Optional geometric deposition/etch allows much larger circuits to be simulated using the same memory Copyright ©2022 Silvaco, Inc. 13

  14. Slide 14: Victory RCx Pro – Back Annotation

    Victory RCx Pro – Back Annotation • Automated annotated SPICE netlist generation Immediate feedback on circuit speed following DOE process or layout modifications Copyright ©2022 Silvaco, Inc. 14

  15. Slide 15: Victory RCx Pro – Current Density

    Victory RCx Pro – Current Density • Current density analysis 3D→2D ２D→１D Copyright ©2022 Silvaco, Inc. 15

  16. Slide 16: Case Studies

    Case Studies • Capacitance extraction on 83 layouts with, Victory RCx Pro, QuickCap and Stellar • Deep submicron CMOS • Flat panel • Memory Cells • MEMS simulation • Local Interconnect Copyright ©2022 Silvaco, Inc. 16

  17. Slide 17: Capacitance Extraction on 83 Layouts

    Capacitance Extraction on 83 Layouts • Capacitance extraction with QuickCap, Victory RCx Pro and Stellar • Layouts – Among the 83 layouts, we find 3 families : – Long parallel lines (73) – Combs (8) – Special process (2) (non-planar) Copyright ©2022 Silvaco, Inc. 17

  18. Slide 18: Capacitance Extraction on 83 Layouts

    Capacitance Extraction on 83 Layouts • The error is calculated as: X -Y errX / Y = ´100 (X + Y )/ 2 • The total number of capacitances extracted is 270 • Analysis – The analysis is made using Spayn – The data set of errors has been filtered (3 sigma filtering) and 261 values have been retained (96.6

  19. Slide 19: Capacitance Extraction on 83 Layouts

    Capacitance Extraction on 83 Layouts Quickcap vs Stellar Quickcap vs Victory RCx Pro Stellar vs Victory RCx Pro Copyright ©2022 Silvaco, Inc. 19

  20. Slide 20: Capacitance Extraction on 83 Layouts

    Capacitance Extraction on 83 Layouts • Statistically capacitance values can be positioned in a diagram showing very good results consistency Stellar Victory RCx Pro Quickcap Capacitance 1.57% 8.31% 9.69% Copyright ©2022 Silvaco, Inc. 20

  21. Slide 21: Deep Submicron CMOS

    Deep Submicron CMOS • Three different ring oscillators Reference “Fringes” Metal1 Metal1 plate over Poly overlapping Poly plate Copyright ©2022 Silvaco, Inc. 21

  22. Slide 22: Deep Submicron CMOS

    Deep Submicron CMOS • 2D cutplanes of the different ring oscillator Reference Metal1 plate overlapping Poly plate “Fringes” Metal1 over Poly Copyright ©2022 Silvaco, Inc. 22

  23. Slide 23: Deep Submicron CMOS

    Deep Submicron CMOS • SPICE simulation results Metal1 plate overlapping Poly plate • Comparison with measurements Reference “Fringes” Metal1 over Poly Copyright ©2022 Silvaco, Inc. 23

  24. Slide 24: Deep Submicron CMOS – CMOS Sensor

    Deep Submicron CMOS CMOS Sensor Copyright ©2022 Silvaco, Inc. 24

  25. Slide 25: Deep Submicron CMOS – G Sensor

    Deep Submicron CMOS G Sensor Copyright ©2022 Silvaco, Inc. 25

  26. Slide 26: Deep Submicron CMOS – CCD Sensor Cell

    Deep Submicron CMOS CCD Sensor Cell Copyright ©2022 Silvaco, Inc. 26

  27. Slide 27: Flat Panel – LCD/TFT Cell

    Flat Panel LCD/TFT Cell Copyright ©2022 Silvaco, Inc. 27

  28. Slide 28: Flat Panel – Comparator

    Flat Panel Comparator 1 Copyright ©2022 Silvaco, Inc. 28

  29. Slide 29: Flat Panel – Comparator

    Flat Panel Comparator 2 Copyright ©2022 Silvaco, Inc. 29

  30. Slide 30: Flat Panel – Simulation area (3x3 matrix)

    Flat Panel Simulation area (3x3 matrix) Copyright ©2022 Silvaco, Inc. 30

  31. Slide 31: Flat Panel – Boundary conditions

    Flat Panel Cyclic Boundary Mirror Boundary Copyright ©2022 Silvaco, Inc. 31

  32. Slide 32: Flat Panel

    Flat Panel Potential apply to Gate2 Line Potential apply to Sosin2 Line Copyright ©2022 Silvaco, Inc. 32

  33. Slide 33: Flat Panel LCD, TFT

    Flat Panel Flat Panel LCD, TFT Copyright ©2022 Silvaco, Inc. 33

  34. Slide 34: Flat Panel – AMLCD-TFT BMT Coupling Capacitance

    Flat Panel AMLCD-TFT BMT: Coupling Capacitance Clc Cdc Clc+Cdc Clc+Cdc (Victory RCx Pro) (Victory RCx Pro) (Victory RCx Pro) (Victory RCx Pro) pixel_0 42.2 61.0 103.2 99.60 pixel_1 32.8 61.1 93.9 93.46 pixel_2 31.6 58.8 90.4 91.25 Copyright ©2022 Silvaco, Inc. 34

  35. Slide 35: Flat Panel – RC delay effect across data line

    Flat Panel AMLCD-TFT BMT: RC delay effect across data line on one Pixel Copyright ©2022 Silvaco, Inc. 35

  36. Slide 36: Memory Cells – SRAM Cell

    Memory Cells SRAM CELL Copyright ©2022 Silvaco, Inc. 36

  37. Slide 37: Memory Cells – Flash Memory: NOR

    Memory Cells Flash Memory: NOR Copyright ©2022 Silvaco, Inc. 37

  38. Slide 38: Memory Cells

    Memory Cells • SRAM and Flash memory cell • Victory RCx uses advanced 3D process simulation to convert SRAM layout into an accurate 3D representation of the SRAM cell Lithographic effects on • Electrical field solutions on the realistic 3D geometry metal geometry can allow accurate extraction of par

  39. Slide 39: Memory Cells

    Memory Cells • SEM photography of 2D sectional area • Cross-section of metal fringe structure Copyright ©2022 Silvaco, Inc. 39

  40. Slide 40: Memory Cells

    Memory Cells Comparison between simulation ( ) and measurements ( ) for Comparison between simulation ( ) and measurements ( ) lateral capacitance. Two parallel lines of metal 3 of 0.6um or different layer fringe or edge capacitance. Two width and 100 um length. parallel lines of 0.6um width and 100

  41. Slide 41: Memory Cells – SRAM Cell and Decoder, Sense AMP

    Memory Cells SRAM CELL and Decoder, Sense AMP Copyright ©2022 Silvaco, Inc. 41

  42. Slide 42: Memory Cells – Sense AMP

    Memory Cells Sense AMP Copyright ©2022 Silvaco, Inc. 42

  43. Slide 43: MEMS Simulation

    MEMS Simulation Results from 3D simulation of the MEMS process flow using Victory RCx Pro SEM morphologies of the fabricated capacitors with different width and lengths Copyright ©2022 Silvaco, Inc. 43

  44. Slide 44: MEMS Simulation

    MEMS Simulation A partial creation of an electrostatic MEMS Part of a MEMS actuator array. MEMS device after isotropic release etch. Copyright ©2022 Silvaco, Inc. 44

  45. Slide 45: Local Interconnect

    Local Interconnect Victory RCx Pro Non-planar pattern: Default Materials Parameter Material Name Relative Permittivity Conductivity [A/V cm] Aluminum 376676 BPSG 3.9 BSG 3.9 Copper 588235 Material(“string”) 3.9 Oxide 3.9 OxyNitride 7.5 Nitride 7.5 Resist 3.9 Polysilicon 376676 TEST Pattern Silicon 3

  46. Slide 46: Local Interconnect

    Local Interconnect 3D structure 2D cut plan Copyright ©2022 Silvaco, Inc. 46

  47. Slide 47: Local Interconnect

    Local Interconnect Physical Geometrical R1 1.6319044 0.9288782 R2 2.2651981 1.2825422 R1 R2 R1 R2 LOCOS+Litho Physical Process Step Etch + no Litho Geometrical Copyright ©2022 Silvaco, Inc. 47

  48. Slide 48: Local Interconnect

    Local Interconnect Isotropic 1 Isotropic 0 Copyright ©2022 Silvaco, Inc. 48

  49. Slide 49: Local Interconnect

    Local Interconnect Internal elbow electric field External elbow electric field R=1.6319044 R=2.2651981 Copyright ©2022 Silvaco, Inc. 49

  50. Slide 50: Conclusions

    Conclusions • Victory RCx should be used for parasitic RC extraction where MAXIMUM ACCURACY is required (no simplifications) • Highly versatile tool – ideal solution for – Via capacitance analysis on 45nm technologies and below (via capacitance is now a significant source of capacitive delay) – Low

Silvaco Group — Technical Presentation (September 2022) on 6ix