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Agilent Technologies — Technical Presentation (2012)

178 slides from Agilent Technologies's technical presentation, Oct 12, 2012

  1. Slide 1: ADS 2011 Complete Enterprise Level Solution Desktop Flow

    ADS 2011 Complete “Enterprise Level Solution” Desktop Flow Copyright © 2012 Agilent Technologies

  2. Slide 2: Agenda

    Agenda 10:00 AM: ADS Design Management & Hands-on-Labs 12:00 PM - 1:00 PM: Complimentary lunch will be provided 1:00 PM: ADS Layout & Verification: DRC & LVS 2:30 PM - 2:45 PM: Break 2:45 PM: ADS Momentum EM Simulator Copyright © 2012 Agilent Technologies 2

  3. Slide 3: Agilent Technologies

    Agilent Technologies Solutions that Address Critical Customer Challenges Business Groups Electronic Chemical Life Measurement Analysis Sciences $3.3B $1.5B $1.8B Comms Petro/chem Food Pharma/ Academic/ Industrial, biotech government Comp/Semi Aero/Defense Environment Forensics $6.6 billion* revenue

  4. Slide 4: Agilent EEsof EDA

    Agilent EEsof EDA Leading Communications Product Design * * Source: Gary Smith EDA’s December 2011 Market Trends Report Copyright © 2012 Agilent Technologies 4

  5. Slide 5: Agilent EEsof Technology Development Centers

    Agilent EEsof Technology Development Centers A Global Presence to Support You Ghent, Belgium Santa Rosa, California Beijing, China Santa Clara, California Alpharetta, Georgia Japan Westlake Village, California Modeling Center New Delhi, India Copyright © 2012 Agilent Technologies 5

  6. Slide 6: Agilent EEsof EDA Solutions

    Agilent EEsof EDA Solutions SystemVue Genesys – ESL – RF Board ADS GoldenGate – MMIC, RF Board, – RF Mixed Signal SiP, HSD EMPro IC-CAP – 3D EM – Device Modeling Copyright © 2012 Agilent Technologies 6

  7. Slide 7: ADS Value Proposition

    ADS Value Proposition • New workspace and library cell view in ADS 2011 supports polymorphism and technology scoping • Makes it possible to design and verify multi-technology projects (different IC technologies, modules, and boards) • Desktop DRC, LVS, and Foundry supported Toolbars Complete the ADS

  8. Slide 8: Complete MMIC/Module ADS Desktop Design

    Complete MMIC/Module ADS Desktop Design Area of focus today Copyright © 2012 Agilent Technologies 8

  9. Slide 9: ADS 2011 on OpenAccess

    ADS 2011 on An enabling technology The new ADS underlying database is OpenAccess. Why? • Existing, proven EDA database • Supports multi-technology and polymorphism natively • Improved layout capacity, performance & automation • Enterprise Level Database • Potential for interoperability with other to

  10. Slide 10: ~100 Si2 Member Companies

    ~100 Si2 Member Companies Copyright © 2012 Agilent Technologies 10

  11. Slide 11: Si2 Interoperability – The Vision

    Si2 Interoperability – The Vision Complete tool interoperability is a long term effort •Some basic interactions will be possible near term •Full tool interoperability will be a longer term effort •Consortium of companies are working on the compatibility challenges – Si2 OpenPDK Consortium (Agilent i

  12. Slide 12: New Database / Using Workspaces

    New Database / Using Workspaces Copyright © 2012 Agilent Technologies

  13. Slide 13: Six Steps for using ADS

    Six Steps for using ADS… You will do all this in the labs: STEP 1: Create a workspace/library (fast and easy wizard) STEP 2: Add a schematic (automatically creates a cell) STEP 3: Capture the design (use palettes and libraries) STEP 4: Add a symbol (draw it or use built-ins) STEP 5: Set up and run t

  14. Slide 14: Starting ADS opens the Main window

    Starting ADS opens the Main window Or, use a desktop shortcut. NOTE: UNIX users use a script! ADS Main window: Getting Started... Use menu commands or Icons: C:\ users \ ads or default Is the default working (home) directory where workspaces will be created Copyright © 2012 Agilent Technologies 14

  15. Slide 15: ADS Main Window File Commands

    ADS Main Window File Commands These have wizards or other dialogs: you will use them in the lab exercises... Next, create a new workspace… Gives access to any appropriate model - ADS 2011 Examples need you will use this in to be un-archived: the lab exercises. Archived files have the extension: .7za

  16. Slide 16: New Workspace Wizard

    New Workspace Wizard Specify a name and location: workspace. Specify a name for the workspace Library. Select other available libraries or PDKs. Every workspace has its own library. You will do this in the lab exercise – type in the names and click NEXT ! NOTE: Older version of ADS use Projects when

  17. Slide 17: Creating New Workspaces (continued)

    Creating New Workspaces (continued) Specify the technology (for layout). The Main window will show the Workspace – you are ready to start designing. Default : ADS Standard layers. Or, use PDK or other library referenced layers– you will see it here. After you have a workspace, these Icons become act

  18. Slide 18: Creating workspace cells/schematics

    Creating workspace cells/schematics Creating a new schematic means: Creating a CELL for the schematic. The schematic is a view in the cell. . Icon label: Now, you have a Default name: schematic - but workspace ! can be changed. Main window FORMAT: • Library name: cell name • Schematic view name Next

  19. Slide 19: Schematic Window Basics

    Schematic Window Basics Move Copy More… * asterisk= not saved. Push / Pop: sub-circuits. Copyright © 2012 Agilent Technologies 19

  20. Slide 20: Inserting & Editing Components

    Inserting & Editing Components Inserting components: cursor with cross-hairs • Click, drag and drop (click) Insert Simulation Components stay attached to controllers from your cursor - end with Esc key palettes also: or the End Command icon. Component history: Double click to edit controllers or com

  21. Slide 21: Editing Simulation parameters

    Editing Simulation parameters... All simulation controllers have tabs for settings: Display tab lists all the settings for on- By default, freq is the swept variable here. screen display. Output tab allows you to select what goes to the dataset. Edit on-screen if the parameter is displayed or Sweep

  22. Slide 22: Simulation Controllers and Sources

    Simulation Controllers and Sources These (linear) are only a few of many ADS simulators and sources: NOTE: AC simulation requires and AC source. These are in the lab… Copyright © 2012 Agilent Technologies 22

  23. Slide 23: Check the schematic for errors

    Check the schematic for errors Click: Tools > Before or after simulation! Wiring / connect pins: Open Connections highlighted: Ready to simulate… To clear highlighting. Copyright © 2012 Agilent Technologies 23

  24. Slide 24: Running the simulation

    Running the simulation... Click: Simulate > Simulation Setup: Before you simulate: • You can name the dataset file. • If not, default dataset = CELL name. Dataset files (.ds) are in the DATA directory. Data Display windows (.dds) are in the WORKSPACE directory. Click here to simulate or use the gear

  25. Slide 25: Simulation information: Status Window

    Simulation information: Status Window One way to stop a Opens when simulating or click: simulation, click: Window > Simulation Status Simulation/Synthesis > Stop Simulation If there is a warning or error, it will appear Or, use schematic window here, and you can click the ? box for info. simulate co

  26. Slide 26: Data Display (DDS) window

    Data Display (DDS) window Copyright © 2012 Agilent Technologies 26

  27. Slide 27: Plot or List data

    Plot or List data Quiz: What is this ? Plot Traces & Attributes: Marker: Insert from palette: Marker Readout: Also, list data. Equations operate on simulation data: write equations here or in schematic (Meas Eqn) Copyright © 2012 Agilent Technologies 27

  28. Slide 28: All the steps are done! Review

    All the steps are done! REVIEW: STEP 1: Create a workspace/library (fast and easy wizard) STEP 2: Add a schematic (automatically creates a cell) STEP 3: Capture the design (use palettes and libraries) STEP 4: Add a symbol (optional) (draw it or use built-ins) STEP 5: Set up and run the simulation (n

  29. Slide 29: Tune Parameters

    Tune Parameters NOTE: You can tune any Simulate > Tuning... available parameters or variables. If tunable, you will Select parameters, tune, and watch the results! see the {t} appear: H: means the trace history is turned on in the Data Display. H Tuning always requires a simulation controller… Next,

  30. Slide 30: Other views and windows in a workspace

    Other views and windows in a workspace… Right-clicking in ADS Folders are for organizing the is useful – try it often workspace - try this later in one of to add, delete, the lab exercises. For example, a rename, and more… folder of FILTER cells. Data Displays are not part of the cell. Copyright © 2

  31. Slide 31: Component Library + all your circuits

    Component Library + all your circuits Similar to the palettes but also allows downloads and shows all your workspace designs Select the part and it is attached to your cursor, ready to insert. Example: your lab library: Links to the latest ADS compatible vendor parts and models! Copyright © 2012 Agi

  32. Slide 32: Schematic Options, Preferences, Tools

    Schematic Options, Preferences, Tools Example: no grid dots and new display color. Hot Keys (key binding) Copyright © 2012 Agilent Technologies 32

  33. Slide 33: Example: Copy View

    Copy a cell view: Example: Copy View Copy any view to any available cell or create a new cell - includes EM and layout views. You can copy cells, schematics, data displays, datasets, libraries, etc. To copy a workspace, use your system (PC or UNIX). Copyright © 2012 Agilent Technologies 33

  34. Slide 34: Lab Exercise

    Lab Exercise • Start ADS 2011 • Create a workspace and schematic • Build a low-pass filter (lumped components) • Set up the S-parameter simulation • Plot the data • Tune the filter parameters • Save all your work The lab should take about an hour to complete… Labs build on each other - the workspace

  35. Slide 35: Additional ADS Resources

    Additional ADS Resources Copyright © 2012 Agilent Technologies

  36. Slide 36: Getting Started With ADS

    Getting Started With ADS (Displayed At ADS Start- Up) Copyright © 2012 Agilent Technologies 36

  37. Slide 37: Copyright © 2012 Agilent Technologies

    Copyright © 2012 Agilent Technologies 37

  38. Slide 38: Copyright © 2012 Agilent Technologies

    Copyright © 2012 Agilent Technologies 38

  39. Slide 39: eLearning Courses

    eLearning Courses Copyright © 2012 Agilent Technologies 39

  40. Slide 40: Free To Supported Customers

    Free To Supported Customers Copyright © 2012 Agilent Technologies 40

  41. Slide 41: The Complete Flow

    The Complete Flow Copyright © 2012 Agilent Technologies

  42. Slide 42: Design of MMIC SPDT Switch using Non-Linear MMIC Demo Kit

    Design of MMIC SPDT Switch using Non-Linear MMIC Demo Kit (MTM) Design Flow: •DC Characterization of the active device •SPDT design using Ideal elements •Layout generation- 2 level Hierarchical design •Design Synchronization- Desktop LVS and DRC •EM simulation – creation of polymorphic models •Compa

  43. Slide 43: Accessing the workspace

    Accessing the workspace Work space location: $HPEESOF_DIR / examples / Tutorials / MMIC_SPDT_Switch.7zap Full Documentation (Application Flow): ADS Main window Help Topics and Index (F1) Applications Design using ADS Designing MMIC SPDT Switch Copyright © 2012 Agilent Technologies 43

  44. Slide 44: Finding Today’s Workspace

    Finding Today’s Workspace Copyright © 2012 Agilent Technologies 44

  45. Slide 45: Opening the MMIC_SPD_wrk Workspace

    Opening the MMIC_SPD_wrk Workspace Copyright © 2012 Agilent Technologies 45

  46. Slide 46: MMIC_SPDT_wrk Workspace

    MMIC_SPDT_wrk Workspace Copyright © 2012 Agilent Technologies 46

  47. Slide 47: Generating Layout

    Generating Layout • Layout is divided into 3 parts and combined to form full layout • Each Layout part is synchronized to get clear schematic. • Full layout is synchronized and simulated. ADS features used: • MMIC Tool bar menu: auto via insertion, converting traces into TLINEs • Physical connectivi

  48. Slide 48: DC Characterization and Proof of concept

    DC Characterization and Proof of concept RF Power is switched Two shunt FETs ground the between two Output arms RF leakage and reduce depending on the applied power in the OFF arm. DC bias DC-IV characterization template can be used to determine ON/OFF bias points Copyright © 2012 Agilent Technologi

  49. Slide 49: Readme Gives Top Level Schematic Descriptions

    Readme Gives To Level Schematic Descriptions Copyright © 2012 Agilent Technologies 49

  50. Slide 50: Switch Design

    Switch Design RF Path To Ground (Improves Isolation) Switching Control Switching Transistors Copyright © 2012 Agilent Technologies 50

  51. Slide 51: Switch Design

    Switch Design Off On Copyright © 2012 Agilent Technologies 51

  52. Slide 52: Design Methodology For Switch

    Design Methodology For Switch •Designer judged the switch to be electrically short, so no matching was considered •The ideal switch was designed in schematic without transmission lines or interconnect parasitics •Layout was generated by placing devices and then routing based on schematic •DRC was us

  53. Slide 53: Looking At The Final Schematic And Layout

    Looking At The Final Schematic And Layout Copyright © 2012 Agilent Technologies 53

  54. Slide 54: Top Level Hierarchical Switch Design

    Top Level Hierarchical Switch Design Copyright © 2012 Agilent Technologies 54

  55. Slide 55: Notice The Transmission Line Extraction

    Notice The Transmission Line Extraction Copyright © 2012 Agilent Technologies 55

  56. Slide 56: Generating Layout (continued)

    Generating Layout (continued) Copyright © 2012 Agilent Technologies 56

  57. Slide 57: Exercise

    Exercise •Open a Layout window •Generate a trace starting on M0 and routing to M2 • Convert traces to Transmission Lines •Sync to Schematic Copyright © 2012 Agilent Technologies 57

  58. Slide 58: Generating Layout (continued)

    Generating Layout (continued) Copyright © 2012 Agilent Technologies 58

  59. Slide 59: Exercise

    Exercise •Using the Layouts from Part1, Part2, and Part3 construct a switch •Each portion is a cell, how can the individual elements be edited? •Generate Schematic with Place Components Copyright © 2012 Agilent Technologies 59

  60. Slide 60: Design Rule Check

    Design Rule Check DC path can be easily verified by Physical connectivity tool Copyright © 2012 Agilent Technologies 60

  61. Slide 61: DRC Options

    DRC Options ADS offers the Desktop DRC Engine and links To The Calibre and Assura Engines Copyright © 2012 Agilent Technologies 61

  62. Slide 62: Exercise

    Exercise •Create a DRC Error •Run drc.ael rule file •View results Copyright © 2012 Agilent Technologies 62

  63. Slide 63: Layout Vs. Schematic

    Layout Vs. Schematic Copyright © 2012 Agilent Technologies 63

  64. Slide 64: ADS LVS Features

    ADS LVS Features Calibre LVS Tightly integrated into the ADS environment Supports running the LVS job on a remote server and viewing results in ADS ADS Desktop LVS Installs with ADS and runs locally Your IP/data never leaves your desktop Checks for equivalent components in schematic and layout Detec

  65. Slide 65: Exercise

    Exercise •LVS between your layout and the ADS design SPDT_full>schematic_syncLay •Remove pad and re-run •View results Copyright © 2012 Agilent Technologies 65

  66. Slide 66: Defining Hierarchy Policies

    Defining Hierarchy Policies Open a new cell ‘SPDT_full’ and add two schematics : schematic _syncLay and schematic_ideal Select a hierarchy policy and simulate. Change data set name for comparison It is tested in another view: SPDT_Spar Sync-Layout has more Insertion loss Copyright © 2012 Agilent Tec

  67. Slide 67: Exercise

    Exercise •Open SPDT_Spar > schematic •Review Views Copyright © 2012 Agilent Technologies 67

  68. Slide 68: EM Simulation

    EM Simulation Remove all the Active elements and attach Ports. Define frequencies, meshing and do Momentum uW simulation. Create Layout- look-alike symbol. Add another new schematic ‘schematic_EMmodel’ to the cell SPDT_full. Add EM symbol. Attach FETs, grounds and ports. Copyright © 2012 Agilent Tec

  69. Slide 69: Exercise

    Exercise •Open SPDT_EMSim > layout •Review setup Copyright © 2012 Agilent Technologies 69

  70. Slide 70: Simulating using all Hierarchy policies

    Simulating using all Hierarchy policies Using all these hierarchy policies, test SPDT switch in a schematic. Note: Any number of views can be added and simulated by polymorphic selection. For ex., you can have another topology for comparison Copyright © 2012 Agilent Technologies 70

  71. Slide 71: Simulating using all Hierarchy policies

    Simulating using all Hierarchy policies Copyright © 2012 Agilent Technologies 71

  72. Slide 72: Transient Simulation

    Transient Simulation Copyright © 2012 Agilent Technologies 72

  73. Slide 73: Skyworks & ADS 2011

    Skyworks & ADS 2011 "A few years back, we began sharing our RF module and multi-technology design challenges with Agilent," said Hongxiao Shao, design automation manager at Skyworks Solutions. "Since that time, we've worked closely to shape a solution. I am excited about the direction Agilent is tak

  74. Slide 74: TriQuint & ADS 2011

    TriQuint & ADS 2011 Upgraded PDKs & RF Module Design Flow "We have upgraded our PDKs utilizing the new ADS 2011 capabilities in order to provide continued superior design support for our mutual customers and to our in-house product designers," said Glen Riley, vice president of TriQuint's Commercial

  75. Slide 75: WIN Semiconductor & ADS 2011

    WIN Semiconductor & ADS 2011 Significantly Expand Design Kit Offering "Our customers require increased design efficiency and effectiveness to handle the advanced challenges of today's sophisticated RF & microwave designs,” said Brian Lee, Vice President of Sales & Marketing center at WIN Semiconduct

  76. Slide 76: Vendor Component Libraries

    Vendor Component Libraries AVX RF Component Library http://www.avx.com/spiapps/Rfmicrowave/ADS_Library.zip Panasonic SMT Component Library http://industrial.panasonic.com/jp/i/00000/for_agilent_re/for_agilent_re.htm Polyfet Libraries http://www.polyfet.com/Polyfet_ADS_Linear_ads2011.zip http://www.p

  77. Slide 77: Basics of EM Simulation

    Basics of EM Simulation Copyright © 2012 Agilent Technologies

  78. Slide 78: Why use EM Simulation

    Why use EM Simulation Momentum or Momentum RF or FEM • You have an enclosed (finite) structure and no accurate model . 3D Preview • You have no accurate model for a passive layout. • You want to know the coupling effects between structures. • You want to optimize the layout real-estate, performance,

  79. Slide 79: Three EM Simulation Engines in ADS

    Three EM Simulation Engines in ADS Momentum RF: Uses Method of Moments to produce a quasi-static solution for capacitive and inductive effects. Faster than full Microwave mode, but neglects space and substrate radiation. Best for electrically-small designs: RFICs, RF boards, and small geometries. Mo

  80. Slide 80: EM runs from ADS Layout

    EM runs from ADS Layout Use the EM menu 3 commands or the emSetup icons. EM requires three things: 1 – Layout with pins (ports) 2 – Substrate definition 3 – EM Setup for simulation 1 The rest is automatic or based on your settings. 2 Low-pass filter example Copyright © 2012 Agilent Technologies 80

  81. Slide 81: 1: Preparing the Layout and Pins

    1: Preparing the Layout and Pins Flattening the layout is EM requires 1 or more pins. optional but not required. Layout pins become Ports in EM setup. Pins need to be connected on the correct layer. This one Gaps may not bee seen – is NOT. May use “Tools > resulting in incorrect results. Check Desig

  82. Slide 82: 2: Substrate Definition

    2: Substrate Definition • Substrates are part of the Library – not the workspace. • Available substrates will appear in the Main window. • PDK substrates will appear when you create a workspace. • Open the Substrate Editor to view, modify, or select a substrate. • Or, create new substrates using the

  83. Slide 83: 2: Substrate Definition (continued)

    2: Substrate Definition (continued) Default (template) substrate is ready to use or edit: Conductor layer, material, thickness, and other properties Check for substrate errors. can be specified here: Click to activate the conductor information. Right-click to map Move mouse over area (add) a conduct

  84. Slide 84: 3: EM Setup - Overview

    3: EM Setup - Overview If the layout (with at least one pin) and substrate are correct, only an EM Setup is required for simulation - and you can use the default settings for some designs. Select the EM engine Overview of the EM setup. If the setup is not complete, a yellow caution sign will appear

  85. Slide 85: 3: EM Setup - Frequency and Output plans

    3: EM Setup - Frequency and Output plans Specify the type and frequencies. Use default setups or specify them: NOTE: Use arrow box to see options. Adaptive: simulates first and last points – then intelligently samples & calculates points in-between while analyzing change in S-parameters. This elimin

  86. Slide 86: 3: EM Setup - Ports

    3: EM Setup - Ports Layout pins become ports for EM: Refresh = identifies existing Layout Pins & refreshes pin list & port definitions. Auto-create new ports or set them individually by dragging pins to port terminal symbols. Can set impedance, calibration type and reference offset: Three requiremen

  87. Slide 87: EM Simulation Results

    EM Simulation Results Job window shows all the Data Display can open automatically when done: simulation information: Adaptive trace (_a) Calculated points With adaptive sweep: you get the calculated points in “dataset_name.ds” and the fitted adaptive trace in “dataset_name_a.ds”. Move the marker sl

  88. Slide 88: EM Model and Symbols

    EM Model and Symbols EM Models and Symbols: The EM model = all setup information and data once a simulation is complete. Use the symbol for simulation If these are selected in the EM Setup: in ADS schematics – drag and then you get them in your cell upon simulation. drop it from the Main window. Las

  89. Slide 89: Visualize Current

    Visualize Current Required when simulating: Three tabs (steps) for visualizing current: Current density, direction, and Start the Visualization: more can be visualized. 1 - Properties: if desired, edit visibility, mesh, color. 2 - Solution Setup: select ports and frequencies 3 - Plot Properties: for

  90. Slide 90: EM Details: Define Technology First

    EM Details: Define Technology First (recommended) The library technology file: Use: Options > Technology to define materials before you setup and run EM simulations. Type can be changed: NOTE: For PDKs, this is usually set up in the design kit - you can view it here. Consult the foundry before makin

  91. Slide 91: EM Details: Port Calibration Types

    EM Details: Port Calibration Types Specify the calibration type based on the component connected to the pin/port. The default port type is TML. Also, a calibrated port is like the calibrated end of a network analyzer cable (phase = 0 at connection point). TML - Default (calibrated port) (Transmissio

  92. Slide 92: Details: Defining the Mesh

    Details: Defining the Mesh If no frequency is set in Options, then the highest simulation frequency will be used at simulation time. A denser mesh and edge mesh = more simulation time and, in some cases, greater accuracy. 5 GHz – No Edge Mesh 10 GHz – No Edge Mesh 10 GHz with Edge Mesh 20 GHz with E

  93. Slide 93: Reference: EM Menu Commands in Layout

    Reference: EM Menu Commands in Layout EM menu commands have some specific uses – there is more information on these later in the course… Used for optimizing or tuning a layout to achieve an S-parameter goal – restricted to planar geometry. See the Help for details. Lab Exercise: Copyright © 2012 Agi

  94. Slide 94: Exercise

    Exercise 2 • Create a new workspace and layout • Define materials in the Technology file • Draw two lines with via to connect them • Add a new substrate and map layers • Setup the EM simulation • Define the ports and other settings • View the simulation data • Optional: basic current visualization T

  95. Slide 95: Summary

    Summary • New workspace and library cell view in ADS 2011 supports polymorphism and technology scoping • Makes it possible to design and verify multi-technology projects (different IC technologies, modules, and boards) • Desktop DRC, LVS, and Foundry supported Toolbars Complete the ADS Flow for desi

  96. Slide 96: Resources

    Resources •ADS 30-Second Demos www.agilent.com/find/eesof-ADS-30-second-demos •Webcasts & Events www.agilent.com/find/eesof-innovations-in-eda www.agilent.com/find/events Copyright © 2012 Agilent Technologies 96

  97. Slide 97: New Knowledge Center

    New Knowledge Center http://edocs.soco.agilent.com/display/support/Knowledge+Center Copyright © 2012 Agilent Technologies 97

  98. Slide 98: Slide 98

  99. Slide 99: Lab Exercise 1: Workspaces, Filter Design, and Tuning

    ADS 2011 Workspaces and Simulation Tools (v.1) LAB EXERCISE 1 Workspaces, Filter Design, and Tuning Topics: Basic structure of ADS workspaces, libraries and cells, including basic design capture, tuning, simulation, and displaying data for analysis. Audience: New users, including design engineers, t

  100. Slide 100: Table of Contents: Lab 1

    Lab 1: Workspaces, Filter Design and Tuning Table of Contents: Lab 1 1. Start ADS 2011 on your computer 3 2. Main Window basics 4 3. Create a new Workspace using the Wizard 5 4. Cells and Schematic views 7 5. Schematic Window basics 8 6. Inserting and wiring components 8 7. Schematic Options: Prefer

  101. Slide 101: 1. Start ADS 2011 on your computer

    Lab 1: Workspaces, Filter Design and Tuning Lab 1: Basics (Part 1): Workspace for ideal LPF design IMPORTANT: This lab assumes ADS 2011 is installed on your computer or you have access to it. If you are in a classroom, ask the instructor if you have any questions. 1. Start ADS 2011 on your computer

  102. Slide 102: 2. Main window basics

    Lab 1: Workspaces, Filter Design and Tuning 2. Main window basics Next - a quick look at the Main window and then on to start a design. a. Click each View tab – you should see the icons change between File View and Folder View. The icons apply to the tabs. You should have no workspace folders or lib

  103. Slide 103: 3. Create a new Workspace using the Wizard

    Lab 1: Workspaces, Filter Design and Tuning 3. Create a new Workspace using the Wizard a. In the Main window, click either the either the icon (shown here) or the menu command File > New > Workspace to create a new workspace. Note that using icons usually means fewer mouse clicks. b. When the wizard

  104. Slide 104: Workspace library and technology settings

    Lab 1: Workspaces, Filter Design and Tuning the workspace) that will be used, unless you change it. This means that any designs you create will be in this library and can be used by other workspaces if referenced. For now, click Next. f. Technology: This dialog allows you to select the available lay

  105. Slide 105: 4. Cells and Schematic views

    Lab 1: Workspaces, Filter Design and Tuning Now you know that the wizard is fast and easy to use for creating new workspaces. The next step is to start designing… 4. Cells and Schematic views The first step in starting a design is to begin with a blank schematic. When you create a new schematic, a c

  106. Slide 106: 5. Schematic Window basics for LPF design

    Lab 1: Workspaces, Filter Design and Tuning d. In the Main window, expand the cell view - you will see the schematic view icon. Also, the library name (My_LPF) may appears as a prefix for the cell name. However, for this workspace, it will be turned off. To do this: right- click on the cell name and

  107. Slide 107: 6. Inserting and wiring components

    Lab 1: Workspaces, Filter Design and Tuning 6. Inserting and wiring components a. In the Lumped Components palette, select (click) the capacitor C (not the C model) and insert it. Then rotate the capacitor for the correct orientation using either the icon or handle as shown here. b. Insert another c

  108. Slide 108: Editing values and adding S-parameter controller

    Lab 1: Workspaces, Filter Design and Tuning d. After the filter is built, edit the value of L1 to be 1.5 nH. To do this, double click the inductor or use the Edit icon (R=17 shown here). Then, in the dialog, change the value and click OK. Also, change the value of C2 =0.5 pF – do this directly on sc

  109. Slide 109: 7. Schematic Options: Preferences

    Lab 1: Workspaces, Filter Design and Tuning g. Use Component History: After the circuit is built, delete capacitor C1 and then reinsert it by typing or selecting (history) the capital letter C in the Component History field and press Enter. Next, edit the value directly on the schematic by highlight

  110. Slide 110: 8. S-Parameter Simulation setup

    Lab 1: Workspaces, Filter Design and Tuning c. To change the background color from white, select the Display tab. Click the Background drop down arrow and select a color you prefer – then click Apply. Light blue is often easier on the eyes. Again, this is optional. d. Finally, look through the other

  111. Slide 111: 9. Launch the simulation and view the Status window

    Lab 1: Workspaces, Filter Design and Tuning 9. Launch the simulation and view the Status window a. At the top of the schematic window, click the Simulate icon gear (shown here) to start the simulation process. b. Next, look for the Status window to appear and you should see messages similar to the o

  112. Slide 112: Creating a rectangular plot

    Lab 1: Workspaces, Filter Design and Tuning b. To create the plot, click on the Rectangular Plot icon and move the cursor (outlined box) into the window and click. When the next dialog box appears, select the S(2,1) data and click the Add button. Then select dB as the format for the data. Click OK i

  113. Slide 113: Adding markers to the trace

    Lab 1: Workspaces, Filter Design and Tuning e. Put a marker on the trace: Click the first marker icon on the toolbar (shown here). You will be prompted to select a trace to insert the marker. With the marker or the marker read-out selected, use the arrow keys to find the closest 3 dB value. f. Next,

  114. Slide 114: 11. Tuning parameter values

    Lab 1: Workspaces, Filter Design and Tuning 11. Tuning parameter values This step introduces the ADS tuning feature that allows you to tune parameter values see the simulation results in the data display. In this step, you first select the components and then select the tuning feature. If you select

  115. Slide 115: Adding components to the tune controller

    Lab 1: Workspaces, Filter Design and Tuning e. Click on the inductor symbol (not the parameter L) and a small dialog appears, click on L and OK. This will add the inductor in the tune controller. f. Go ahead and add the other capacitor so that all three components are tunable and try tuning to get a

  116. Slide 116: Workspace Folder and Library views

    Lab 1: Workspaces, Filter Design and Tuning j. Workspace Folder and Library views: Only the Main window should appear now with one cell, one schematic, and one Data Display in the Folder View. Verify this and also look at the Library View which shows all the files for the workspace, including datase

  117. Slide 117: Flow Exercise 1

    Flow Exercise 1 “Enterprise Level Solution” Copyright © 2012 Agilent Technologies

  118. Slide 118: Create A New Layout

    Create A New Layout Name your layout and click OK A Layout window and a corresponding Layers window will open. Copyright © 2012 Agilent Technologies 2

  119. Slide 119: Toolbars

    Toolbars These rows of Icon are referred to as “toolbars” in ADS. They group functions within a related capability in a quick easy to view location. The bottom row is the DemoKit_MIM toolbar that applies to the specific technology in use. Copyright © 2012 Agilent Technologies 3

  120. Slide 120: Creating A Trace (continued)

    Creating A Trace (continued) First set drawing layer to M0, this is the starting layer Insert Trace Add Ports Copyright © 2012 Agilent Technologies 4

  121. Slide 121: Visualize Layout

    Visualize Layout Copyright © 2012 Agilent Technologies 5

  122. Slide 122: Extract Transmission Line Equivalent Circuit

    Extract Transmission Line Equivalent Circuit Convert Traces Result Copyright © 2012 Agilent Technologies 6

  123. Slide 123: Extract Transmission Line Equivalent Circuit

    Extract Transmission Line Equivalent Circuit Copyright © 2012 Agilent Technologies 7

  124. Slide 124: Generate Schematic

    Generate Schematic Copyright © 2012 Agilent Technologies 8

  125. Slide 125: Generate Schematic

    Generate Schematic Copyright © 2012 Agilent Technologies 9

  126. Slide 126: Generating Schematic

    Generating Schematic Choose Port 1 as the starting point for schematic and click OK Copyright © 2012 Agilent Technologies 10

  127. Slide 127: Schematic Is Generated

    Schematic Is Generated Copyright © 2012 Agilent Technologies 11

  128. Slide 128: The Schematic And Layout Are Linked

    The Schematic And Layout Are Linked Click on a wire connecting two of the components and delete it. The solid line wire is replaced with a dashed line. This is referred to as a flight line, and even though the user removed the wire connecting the components in the schematic in the layout they are st

  129. Slide 129: Flow Exercise 2

    Flow Exercise 2 “Enterprise Level Solution”

  130. Slide 130: Create Switch Layout

    Create Switch Layout -Open a new layout and name it, I called mine mySwitch. Copyright © 2012 Agilent Technologies 14

  131. Slide 131: Create Switch Layout

    Create Switch Layout -From the main window drag and drop the pieces of the layout Select Part 1 and drag and drop to Layout Copyright © 2012 Agilent Technologies 15

  132. Slide 132: Click To Place Part 1 And Then Add Parts 2 and 3

    Click To Place Part 1 And Then Add Parts 2 and 3 Copyright © 2012 Agilent Technologies 16

  133. Slide 133: Verify Connections: Show Physical Interconnect

    Verify Connections: Tools>Check Connectivity>Show Physical Interconnect Copyright © 2012 Agilent Technologies 17

  134. Slide 134: Click On Trace

    Click On Trace The connectivity checker shows all physical connections to the network by highlighting the connections Copyright © 2012 Agilent Technologies 18

  135. Slide 135: Place Components From Layout To Schematic

    Place Components From Layout To Schematic In this mode each of the Parts are dragged and dropped from Layout to Schematic Copyright © 2012 Agilent Technologies 19

  136. Slide 136: Tools>Check Design

    Tools>Check Design Copyright © 2012 Agilent Technologies 20

  137. Slide 137: Edit Layout

    Edit Layout Clicking on a portion of the design highlights the hierarchy not the individual components. We need to push into the hierarchy with the edit in place function. Copyright © 2012 Agilent Technologies 21

  138. Slide 138: Individual Items Are Now Selectable

    Individual Items Are Now Selectable Return to top of hierarchy or pop-up one level. Copyright © 2012 Agilent Technologies 22

  139. Slide 139: Flow Exercise 3

    Flow Exercise 3 “Enterprise Level Solution”

  140. Slide 140: Running DRC

    Running DRC Start with the mySwitch design. Under tools > DRC, this starts the DRC Checker Copyright © 2012 Agilent Technologies 24

  141. Slide 141: Setup DRC

    Setup DRC Use ADS DRC engine. Note in the pull down that Calibre and Assura are also available if needed. Use the Rule Location pull down to find the DemoKit_MTM file. Copyright © 2012 Agilent Technologies 25

  142. Slide 142: DRC Setup

    DRC Setup Select drc.ael. This is the full deck, the others are individual rules. Then run Copyright © 2012 Agilent Technologies 26

  143. Slide 143: Design Is Clean

    Design Is Clean No surprise. This design was corrected and should be DRC clean. Copyright © 2012 Agilent Technologies 27

  144. Slide 144: DRC Results Viewer Should Have Launched

    DRC Results Viewer Should Have Launched Copyright © 2012 Agilent Technologies 28

  145. Slide 145: Create An Error

    Create An Error Area to create error in Copyright © 2012 Agilent Technologies 29

  146. Slide 146: Zoom Into Resistor Area

    Zoom Into Resistor Area Copyright © 2012 Agilent Technologies 30

  147. Slide 147: Delete Transmission Line Section

    Delete Transmission Line Section Descend into hierarchy and delete transmission line Copyright © 2012 Agilent Technologies 31

  148. Slide 148: Create Error

    Create Error From toolbar select stretch transmission line and stretch it to reconnect Copyright © 2012 Agilent Technologies 32

  149. Slide 149: Via Is Now On Top Of Resistor

    Via Is Now On Top Of Resistor Return to top level Copyright © 2012 Agilent Technologies 33

  150. Slide 150: Re-Run DRC

    Re-Run DRC Copyright © 2012 Agilent Technologies 34

  151. Slide 151: View Errors

    View Errors View other errors Copyright © 2012 Agilent Technologies 35

  152. Slide 152: Reset Layout

    Reset Layout Push back into hierarchy and use undo to correct layout Copyright © 2012 Agilent Technologies 36

  153. Slide 153: Flow Exercise 4

    Flow Exercise 4 “Enterprise Level Solution”

  154. Slide 154: Returning To Top Of mySwitch

    Returning To Top Of mySwitch The Schematic has ports Port 1 on the pads so add ports to match Schematic. Port 2 Port 5 Port 3 Port 4 Copyright © 2012 Agilent Technologies 38

  155. Slide 155: Start ADS Desktop LVS

    Start ADS Desktop LVS Copyright © 2012 Agilent Technologies 39

  156. Slide 156: LVS Dialog

    LVS Dialog Initially, LVS is setup to compare the mySwitch Layout to the mySwitch Schematic. However we would like to compare it to the full design in the project, so point to the full schematic by browsing Copyright © 2012 Agilent Technologies 40

  157. Slide 157: SPDT_Full>schematic_syncLay

    SPDT_Full>schematic_syncLay Copyright © 2012 Agilent Technologies 41

  158. Slide 158: Launch LVS

    Launch LVS Copyright © 2012 Agilent Technologies 42

  159. Slide 159: LVS Results

    LVS Results As expected the results are clean, but these ability to LVS a Layout with a Different Schematic name is a new capability to ADS. Copyright © 2012 Agilent Technologies 43

  160. Slide 160: Push Into Part 2 And Remove A Pad. Rerun LVS

    Push Into Part 2 And Remove A Pad. Rerun LVS Copyright © 2012 Agilent Technologies 44

  161. Slide 161: Two Errors Are Generated

    Two Errors Are Generated Copyright © 2012 Agilent Technologies 45

  162. Slide 162: Lab Exercise 2: EM Basics (Momentum)

    ADS 2011 EM Basics (v2 October 2011) LAB EXERCISE 2 EM Basics (Momentum) Topics: EM simulation in ADS, focusing on Momentum, including substrate and port setups, 3D viewing, visualization, and more. Audience: Engineers who have a basic working knowledge of ADS 2011, have completed the prerequisite c

  163. Slide 163: Table of Contents: Lab 2

    Lab 2: EM Basics Table of Contents: Lab 2 1. Create a New Workspace and Layout 3 2. Define Dielectric Materials: Technology File 4 3. Draw a layout: 2 metal strips and a via 5 4. Open the EM Simulation Setup 6 5. Add a new Substrate 6 6. Define strip conductors (metal) 8 7. Add a Substrate Layer 9 8

  164. Slide 164: 1. Create a New Workspace and Layout

    Lab 2: EM Basics 1. Create a New Workspace and Layout a. In the ADS Main window, use the wizard to create a new workspace: File > New > Workspace or use the icon. Name the workspace and library: My_EM_wrk - add only the Analog/RF library as shown here and finish. b. Create a new layout using the def

  165. Slide 165: 2. Define Dielectric Materials: Technology File

    Lab 2: EM Basics 2. Define Dielectric Materials: Technology File a. Click the Add Dielectric button and a default name (Dielectric_1) will be added. Next, change the Real value = 6 (Permittivity) as shown here and click Apply. You could set other values but this is enough. b. Click the Add From Data

  166. Slide 166: 3. Draw a layout: 2 metal strips and a via

    Lab 2: EM Basics c. Next, select the Conductors tab and click Add Conductor. The default will be added (Conductor_1). Then click Add From Database and select Gold, then click OK to add it and click Apply. With the materials added, click OK. 3. Draw a layout: 2 metal strips and a via a. In the layout

  167. Slide 167: 4. Open the EM Simulation Setup

    Lab 2: EM Basics b. Save the layout when you have finished – you will add pins/ports later. 4. Open the EM Simulation Setup a. Select the EM Simulation Setup icon in layout to open the EM Setup dialog (shown here). b. Notice the yellow caution signs next to the Substrate and Ports icons. This means

  168. Slide 168: Substrate editor stack-up

    Lab 2: EM Basics d. This is the substrate editor with a 3-D like view of the layers for this template, including a conductor (cond) and the boundary conditions. This is always a starting point for new substrates. Read the information on the right about how to add, delete, or select items but do not

  169. Slide 169: 6. Define strip conductors (metal)

    Lab 2: EM Basics 6. Define strip conductors (metal) Now you will define the cond drawing layer to be a strip conductor: Gold. a. Click on the cond strip in the graphical substrate editor on the left - it will become outlined and the properties will appear on the right. You always have to click on th

  170. Slide 170: 7. Add a Substrate Layer

    Lab 2: EM Basics 7. Add a Substrate Layer a. Use the cursor and right-click in the Alumina substrate area as shown here. Then click Insert Substrate Layer Above as shown. Immediately, another Alumina substrate is added and you have two Alumina layers. b. On the right panel, use the drop-down arrow b

  171. Slide 171: Map Conductor Layer

    Lab 2: EM Basics b. Move your cursor to the interface above Dielectric-1 as shown here, and right-click. c. Select the command Map Conductor Layer and another strip conductor will appear: cond2. With cond2 selected, go to the panel on the right and set the Material to Conductor_1. Also, and click to

  172. Slide 172: 9. Importing Substrates

    Lab 2: EM Basics Now it’s time to set the ports but first you should see the commands for importing substrate files into ADS from other ADS versions. 9. Importing Substrates a. In the Substrate Editor window, select the comamnd File > Import shown here, and look at each dialog that appears for each

  173. Slide 173: 11. Selecting Pins and Defining Ports

    Lab 2: EM Basics 11. Selecting Pins and Defining Ports a. In the layout window, select the Insert Pin icon and insert two pins (P1 and P2) as shown here – you do NOT need to change layers. b. Go to the EM Setup window and click the Ports icon. c. Notice that the S-parameters ports area is empty as s

  174. Slide 174: 12. Using the 3D EM Preview

    Lab 2: EM Basics e. Use your cursor to click in the fields shown here. This is how you can change port settings for your designs. But do not make any changes for this lab. f. Click the Save icon to save this EM setup. 12. Using the 3D EM Preview a. With the substrate and the ports now complete, you

  175. Slide 175: 13. Defining Frequency Plan, Output Plan, and Mesh Options

    Lab 2: EM Basics 13. Defining Frequency Plan, Output Plan, and Mesh Options a. In the EM Setup window, click the Frequency plan icon and set the Fstop to 2 GHz using your cursor in the field. This is how you set values in these fields. b. Then click the Output plan icon and look at the Dataset name

  176. Slide 176: 14. EM Model and Simulation

    Lab 2: EM Basics 14. EM Model and Simulation a. In the EM Setup window, click the Model/Symbol icon. b. In the EM Model section, check the box to Create EM Model when simulation is launched. Leave the Symbol area alone – you will use that in the next lab exercise. c. Now, click the Simulate button a

  177. Slide 177: 15. EM Simulation Data

    Lab 2: EM Basics 15. EM Simulation Data a. When the simulation is finished, the Data Display with the default template results will appear. Notice that the Data Display has three pages – look them over and also notice that the default dataset is the adaptive data: the cell name ends with: _a. This i

  178. Slide 178: 16. Optional: Visualization of Current

    Lab 2: EM Basics 16. Optional: Visualization of Current Do this only if you have time – you will visualize current in the next lab exercise so this step is only is you have finished the other steps quickly. a. Click the Visualization icon in layout as shown here. b. When the window opens, go to the

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