Micron Technology, Inc. · NASDAQ:MU
Micron Technology — Flash Memory Summit 2007
23 slides from Micron Technology's conference presentation, August 2007
Slide 1: NAND Flash Reliability and Performance: The Software Effect
NAND Flash Reliability and Performance The Software Effect Wes Prouty (waprouty@micron.com) Applications Engineering Manager Micron Technology, Inc.
Slide 2: Agenda
Agenda Why change NAND Flash software? Review of NAND Flash error modes Review of NAND Flash performance enhancements Status of NAND software in embedded operating systems NAND Flash software stack variations How is software affected by MLC NAND? Is software the only solution? Santa Cl
Slide 3: Why Change NAND Flash Software?
Why Change NAND Flash Software? Embedded space has predominately used small-page, single-level cell NAND Flash Code storage is moving to NAND Flash in many applications As NAND Flash geometries shrink, software usage models must become more sensitive to NAND error modes New NAND devices incl
Slide 4: Program Disturb
Program Disturb Stressed cells are limited I/O I/O I/O I/O to the block being SGD: Vcc Programmed programmed Unselected Cells Page: 10V However, stressed cells Selected can be in selected or Page: 20V unselected page Unselected Page: 10V Program Disturb occurs when Disturb Cells charge collect
Slide 5: Read Disturb
Read Disturb I/O I/O I/O I/O Stressed cells limited to the block being programmed Unselected Page 4.5V Stressed cells are in Selected Page 0V unselected page Unselected Disturb occurs when Page 4.5V charge collects on the floating gate, causing the Stressed cell to appear weakly Cells programm
Slide 6: Endurance and Data Retention
Endurance and Data Retention Endurance – PROGRAM/ERASE cycles may cause charge to be trapped in the dielectric. This is a failed block that should be retired. Data Retention – Charge loss/gain occurs on the floating gate over time. Cell is undamaged, block can be reliably erased and reprogrammed
Slide 7: Reducing NAND Error Modes
Reducing NAND Error Modes Program Disturb • Reduce partial page programming (NOP) • Programming the pages of each block in sequential order Read Disturb • Frequently read data should be cached to DRAM • Refresh data when exceeding read disturb recommendations Endurance and data retention • Ret
Slide 8: NAND Flash Performance
NAND Flash Performance Embedded systems are primarily using 512- byte NAND Flash, which has lower performance than 2KB NAND Flash Those systems using 2KB NAND Flash only implement the “basic” commands NAND Flash enhanced feature set greatly improves NAND Flash performance: • Read performance c
Slide 9: NAND Flash Performance: 4Gb NAND throughput
NAND Flash Performance 4Gb NAND (M50, 55nm) Performance 40.00 37.55 x16 30.00 27.04 Throughput (MB/s) 20.00 14.01 10.66 10.00 7.02 6.07 0.00 Page Read Cache Page Pgm Cache Pgm 2Pl Page 2Pl Cache Read Pgm Pgm Operating Mode Santa Clara, CA USA August 2007 9
Slide 10: Status of NAND Software in Embedded Operating Systems
Status of NAND Software in Embedded Operating Systems Wear Leveling Code Wear Leveling Data Enhanced NAND Feature Support Data Refresh ECC Support MLC Support Management Bad Block NOP = 1 Storage Storage OS #1 Yes Yes Yes No No No No No OS #2 Yes Yes Yes No No No No No OS #3 Yes Yes Yes No No No No
Slide 11: The FTL NAND Software Model
The FTL NAND Software Model The FTL model is used by Windows Mobile, Symbian, and many other embedded operating systems The NAND usage model is controlled by the FTL Need FTL changes to address: • NOPs • Enhanced performance features • Wear leveling of code storage • Data refresh • MLC NAND
Slide 12: How Can We Drive NAND Usage Model Changes in FTL?
How Can We Drive NAND Usage Model Changes in FTL? Work with the major operating system companies to change FTL delivered with OS • Pro – covers the widest range of applications, NAND Flash code comes with OS • Con – software changes slow, may not cover all application requirements Work with soft
Slide 13: The MTD NAND Software Model
The MTD NAND Software Model The MTD model is used by Embedded Linux Operating Systems Note that the NAND Flash usage model is controlled by the file system in this model (Typically implies JFFS2 File System) (Hardware) Santa Clara, CA USA August 2007 13
Slide 14: The MTD NAND Software Model – More Detail
The MTD NAND Software Model – More Detail MTD driver module changes MTD Driver Module required to implement enhanced NAND features Changes must be considered Flash Interface Layer (interface to MTD user module) carefully so they don’t force changes to upper layers (which are more difficult to im
Slide 15: How Can We Drive NAND Usage Model Changes in MTD?
How Can We Drive NAND Usage Model Changes in MTD? Develop new code for MTD user and driver modules that addresses NAND usage model and performance issues: • Pro – addresses reliability and performance issues • Con – the required file system changes are not likely to be adopted quickly Update MTD
Slide 16: How is Software Affected by MLC NAND?
How is Software Affected by MLC NAND? MLC vs. SLC differences from a software standpoint: • Number of pages per block: SLC = 64, MLC = 128 • Spare area in page may be larger for MLC • Bad block marking may change All performance and reliability discussions from this presentation are applicable t
Slide 17: Effect of ECC Requirements on Page Size
Effect of ECC Requirements on Page Size Type Hamming Reed-Solomon Binary BCH Overhead Spare Overhead Spare Area Overhead Spare Area Per Area Per Sector Usage Per Sector Usage Sector Usage ECT1 Bit Byte 64B 112B Bit Bytes 64B 112B Bits Byte 64B 112B s s s s 1 13 2 13% 7% 18 3 19% 11% 13 2 13% 7% 2 -
Slide 18: Page Layout for SLC 2KB NAND Flash
Page Layout for SLC 2KB NAND Flash SLC bad blocks identified by writing a non-FF value to first byte (2048) of spare area in page 0 or 1 of the block Typical Spare Sector A Sector B Sector C Sector D 2KB (64 page (512 bytes) (512 bytes) (512 bytes) (512 bytes) bytes) Bad Sector A Sector B Sector C S
Slide 19: Page Layout for SLC 2KB NAND Flash
Page Layout for SLC 2KB NAND Flash Santa Clara, CA USA August 2007 19
Slide 20: Is Software the Only Solution?
Is Software the Only Solution? Software Solution Hardware Solution Application Programs Operating System File System Flash Translation Layer (FTL) Logical to Physical Address Translation. Implementation of Wear leveling algorithms. Implementation of Bad Block Management. Implementation of NAND Flash
Slide 21: Conclusion
Conclusion Shrinking NAND Flash geometries require software adjustments to ensure hardware reliability New NAND Flash performance features require software changes to enhance system performance Different operating systems require different NAND Flash software solutions Addressing performance
Slide 22: References
References Micron NAND Flash: www.micron.com/nand/ Linux MTD Driver: www.linux-mtd.infradead.org/source.html Microsoft Windows Mobile: www.microsoft.com/windowsmobile Symbian Operating System: www.symbian.com/ Datalight: www.datalight.com/ CMX Systems: www.cmx.com/ Santa Clara, CA USA Au
Slide 23: About Wes Prouty
About Wes Prouty Embedded Applications Engineering Manager for Micron Technology BSME from University of Idaho; MSEE from Boise State University 10 years experience in design and test of embedded applications and memory devices waprouty@micron.com (208) 363-2283 ©2007 Micron Technology, In