4ds Memory Ltd. · ASX:4DS
4ds Memory — Investor Presentation (January 2025)
21 slides from 4ds Memory's investor presentation, January 2025
Slide 1: Persistent ReRAM from 4DS Memory – Capital Raise
Beyond Barriers: Enabling Future AI PERSISTENT RERAM FROM 4DS MEMORY CAPITAL RAISE David McAuliffe Peter Himes Ting P Yen EXECUTIVE CHAIRMAN CHIEF STRATEGIC OFFICER CHIEF TECHNICAL OFFICER JANUARY 2025
Slide 2: Disclaimer
Disclaimer Important Notice This presentation (Presentation), together with any information communicated by 4DS Memory Limited (ACN 145 590 110) (the Company or 4DS), in any presentation or discussion relating to this Presentation (collectively, Information) is confidential, and has been prepared by
Slide 3: 4DS: The Right Memory for the Right Market at the Right Time
4DS: The Right Memory for the Right Market at the Right Time • Based in Silicon Valley, 4DS is developing a high speed, high endurance and low energy memory technology to enable future AI systems. 4DS Overview • 4DS’ unique PCMO ReRAM technology will bridge the gap between volatile DRAM (fast & shor
Slide 4: World Class Management Team
World Class Management Team Mr Ting P Yen Mr David McAuliffe Mr Peter Himes Chief Technology Officer Executive Chairman Chief Strategic Officer • Over 30 years of semiconductor experience • Experienced board director and entrepreneur who has • Over 35 years in high growth technology firms, with over
Slide 5: 4DS Fits Uniquely Into The Existing Memory Hierarchy
4DS Fits Uniquely Into The Existing Memory Hierarchy System memory architectures volatile generally trade off between non-volatile speed and capacity <1 ns CPU and Core To date there is a gap between the high SRAM speed (but volatile) DRAM and the high 3 - 10 ns SPEED density (but slow) Flash Main m
Slide 6: 4DS Technology
4DS Technology The technology behind 4DS Memory is Memory can be a type of Persistent Resistive Random broadly divided into Access Memory (ReRAM) which switches Volatile and Non- the memory cell between a ‘1’ or ‘0’ state, Volatile (NV) in the digital sense. technologies The 4DS cell is based on a d
Slide 7: Area Based Interface Switching
Area Based Interface Switching Current is spread across entire interface area. Low current densities lead to high cell endurance. Top electrode Thin oxide layer FAST Super fast programming PCMO Switching Layer One Shot write E Field injects or removes oxygen Area based current from PCMO High enduran
Slide 8: The 4DS Advantages
The 4DS Advantages Persistent Tunable Low Energy Scalable to Any Analog Memory at Retention from per Bit Process Node Programmability DRAM Speeds Hours to Days Single write pulse for Highest energy For Warm Data and Simple fab By time or voltage hours to days of optimization for warm Persistent Memo
Slide 9: Importance of 4DS for Today's Applications
Importance of 4DS for Today’s Applications Persistent Memory Warm Data Edge AI for Big Data Applications Applications Combines DRAM speed with adequate Operates at DRAM speeds without Meets high performance in data retention for faster data access constant updating, lowering energy resource-constrai
Slide 10: 4DS Commercialisation Pathway
4DS Commercialisation Pathway Significant technical de-risking achieved. Material technical and commercial milestones over the coming 18 months PHASE 1 PHASE 2 PHASE 3 Memory Cell 4th Platform Lot 5th Platform Lot 6th Platform Lot Custom Memory Architecture (4DS) (4DS & imec) (4DS & imec) (4DS & ime
Slide 11: 4th Platform Lot: Groundbreaking Results
4th Platform Lot: Groundbreaking Results 4 TH P L A T F O R M L O T Picture of 4DS wafer out of imec, Belgium. This wafer image and circuit design are PURPOSE copyright imec and are used with Demonstrate Megabit Array Performance of 4DS Memory permission. RESULTS Demonstrated write speed at DRAM s
Slide 12: imec Development – Update
imec Development – Update 5TH PLATFORM LOT 6TH PLATFORM LOT FUTURE IMEC/4DS DEVELOPMENT PURPOSE PURPOSE PURPOSE Tune and verify necessary process To demonstrate scalability of 4DS Optimisation of 4DS PCMO ReRAM in adjustments on the 60nm cell to support technology to 20nm node support of Infineon de
Slide 13: Infineon Technologies Design Agreement
Infineon Technologies Design Agreement • 4DS will work with imec, Infineon Technologies LLC (Infineon) and a first Tier Taiwanese foundry to design and build a custom ReRAM Test Chip • This Test Chip will be based on the unique requirements of the 4DS Interface Switching ReRAM Technology Infineon Te
Slide 14: Value Chain for Memory Test Chip Development
Value Chain for Memory Test Chip Development CUSTOM TEST CHIP 1st Tier Foundry • Architecture/ Definition ✓ ✓ DESIGN • Design / Verification ✓ ✓ • Design TAPEOUT ✓ ✓ ✓ • Front End Fabrication ✓ FABRICATION • Back End Fabrication ✓ ✓ • Fabrication Complete ✯ ✓ TEST • Test Chip Testing P E R S I S T E
Slide 15: Significance of the Infineon Agreement
Significance of the Infineon Agreement Infineon Agreement: 4DS Strategic Objective: • The next step in technology development is to Licensing and/or M&A: develop a Memory Test Chip fully customized • Commercial engagement requires 4DS to to the 4DS technology demonstrate clear superiority of its mem
Slide 16: Key Catalysts & Outlook
Key Catalysts & Outlook Announced 15 Q1 Expected Expected Expected Expected Ongoing January 2025 CY25 1H 2025 1H CY26 1H CY26 2H 2026 Engagement Completion of testing Commencement of Results of Sixth Manufacturing & Completion of 4DS Memory Test Chip With potential and characterisation of 4DS – Infi
Slide 17: Capital Raising Overview
Capital Raising Overview • A Placement to sophisticated and professional investors of approximately $6.0m, comprising; Placement The issue of approximately 166.7 million new shares in the Company (“New Shares”) under the company’s existing placement capacity per LR7.1 & 7.1A (“Placement”) • 4DS wi
Slide 18: Capital Raising Timetable
Capital Raising Timetable INDICATIVE CAPITAL RAISING TIMETABLE1 DATE Trading Halt, Bookbuild Opens Wednesday, 15 January 2025 Announcement of Capital Raising and Trading Halt Lifted Friday, 17 January 2025 Record Date for the SPP Offer Thursday, 16 January 2025 Settlement of Placement Wednesday, 22
Slide 19: Foreign Selling Restrictions
Foreign Selling Restrictions Hong Kong WARNING: This document has not been, and will not be, registered as a prospectus under the Companies (Winding Up and Miscellaneous Provisions) Ordinance (Cap. 32) of Hong Kong, nor has it been authorised by the Securities and Futures Commission in Hong Kong pur
Slide 20: Thank you for your time
Thank you for your time. lols Memeny
Slide 21: For More Information
Beyond Barriers: Enabling Future AI FOR MORE INFORMATION Registered Office USA Office Level 2, 50 Kings Park Road 3155 Skyway Court West Perth WA 6005 Fremont CA 94539 Postal Address Phone +61 6377 8043 PO Box 271 Email info@4dsmemory.com West Perth WA 6872 Web 4DSmemory.com