Slide 1: Achieving Unmatched Power Density with Multi-Output Power Modules
Achieving Unmatched Power Density with Multi- Output Power Modules Thomas Berner Tomas Hudson Manager Product Marketing and Product Marketing Engineer Application Active Components Monolithic Power Systems CODICO Deutschland GmbH October 2024 MPS & Codico Joint Webinar
Slide 2: CODICO: COmponent Design-In COmpany
COmponent Design-In COmpany FIN N Pan-European Design-In oriented Distributor S EE LV Headquarter in Austria DK LT HUB IRL Strong Focus on Leading Suppliers and UK NL PL + Customer Support B D HONGKONG L CZ SK A H CH RO F SLO HR SRB BG I P E 10.10.2024 2
Slide 3: 3 Sales Groups with dedicated Sales and Technical Support
3 Sales Groups with dedicated Sales and Technical Support Active Passive Components Components Interconnect • Power Conversion • Capacitors • Connectors • Semiconductors & • Inductors & • Terminal Blocks and Modules EMI Components Housings •Opto Electronics & • Relays & Switches • Antenna & RF Solut
Slide 4: Worldwide Presence
WORLDWIDE PRESENCE Netherlands HQ – Kirkland, WA USA San Jose, CA USA Munich, Germany Barcelona, Spain Ettenheim, Germany Chengdu, China
Slide 5: Product Families
PRODUCT FAMILIES AC/DC Power Conversion E-Fuse, USB & Load Switches Class-D Audio • High-Voltage Buck Regulators • Configurable Current Limit, Up to 50A per Device • Digital Controllers and Processors • High-Voltage LDOs • Adjustable Slew Rate • Analog Input Class-D Amplifiers • Flyback Controllers
Slide 6: Simplifying Design with MPS – Power Modules
Simplifying Design with MPS – Power Modules Monolithic Power Stage Customized, Soft Better EMI Performance Saturation Inductor Wide Temp Mesh-connect Range Passives Packaging Technology MPM38111 MP2152 × 2 Module layout optimized for EMI: Small Solution Size Smaller switch node Smaller hot loops Sim
Slide 7: Common Applications
Common Applications FPGA/ASIC/SoC Optical Communications Drones/Robotics Industrial
Slide 8: Powering FPGA/DSP/SOC
Powering FPGA/DSP/SOC FPGA Power Constraints: • High Current Rails • Low Core Voltages • Large, complex power trees • Fast load transients • Heat dissipation Designers need: • Simple designs • Small solution size • Flexible designs • Precise voltage regulation • High efficiency
Slide 9: Example: Xilinx Zynq US+
Example: Xilinx Zynq US+ Vin 12V 0.85 V @ 40A / 20A Rail 1 VCC_PSINTFP Vin Vo 1 MPM3695-25 VCC_PSINTFPDDR SEQ_EN1 SEQ_PG1 En Pg -A for 40A, use 2 x MPM3695-25 -B for <20A, use MPM3695-25 MPM3695-25 Vin Vo 1.8V @ 2A Rail 2 2 VCC_PSINTLP SEQ_EN3 MPM3620A SEQ_PG3 En Pg 1.2V @ 20A / 3A Rail 3 VCCAUX Vin
Slide 10: Simplifying Design with MPS – Reference Designs
Simplifying Design with MPS – Reference Designs Intel Altera Power Partner √ High Efficiency √ Ultra-Fast Transient Response √ Small footprint √ Full reference designs
Slide 11: Single Output Solution - Xilinx Zynq US+
Single Output Solution - Xilinx Zynq US+ -A for 40A, use 2 x MPM3695-25 -A for 2 – 8A, use MPM3695-10 -B for <20A, use MPM3695-25 -B for <2A, use MPM3620A Vin 12V 0.85 V @ 40A / 20A Rail 1 0.9V @ 2A Rail 6 Vin Vo 1 Vin Vo 6 SEQ_EN1 MPM3695-25 SEQ_PG1 SEQ_EN2 MPM3695-10 SEQ_PG2 En Pg En Pg MPM3695-25
Slide 12: Discrete vs Single output
Discrete vs Single output Discrete Solution Size: Width to Height ratio: 8.7 x 16.7 cm; Total Area Used: 145.3 cm²; Single Output Solution Size: Optional Width to Height ratio: 8.45 x 13.5 cm; Total Area Used: 114.8 cm²; Single Output Solution Saves Up to 21% of board Space Single Output Discrete
Slide 13: Simplifying Design with MPS – PMIC Modules
Simplifying Design with MPS 3 – PMIC Modules 1A 2A 3A 5A 10A+ 25A+ Coming Soon Coming Soon 6-45V, Dual 12A, <45V 4-45V, Dual 3A Parallelable Step-Down Power Module Buck Power Module 10x10x4.4mm, LGA 15x30x5.2mm, BGA MPM54304 MPM54504 MPM81204 MPM82504 2A, 2A, 3A, 3A 3-16V, Quad 5A 4-16V, Dual 12A, D
Slide 14: MPM54524 – Quad 5A Power Module
MPM54524 – Quad 5A Power Module Key Advantages: Released • Wide 4V to 16V Input Voltage Range • Adaptive COT for Ultrafast Transient Response • Channel A/B and Channel C/D Support up to 10A Continuous Current in Parallel Mode • Programmable Active Load Line (Droop Resistance) up to 100mΩ • Different
Slide 15: PMIC Module Solution - Xilinx Zynq US+
PMIC Module Solution - Xilinx Zynq US+ MPM54524-0012/0011 Preconfigured for powering the XCZU3EG MPM54524-0012 Buck A 0.85V / 3.7A 1 VCC_PSINTFP VCC_PSINTFPDDR MPM54524 MP2002A Vin 12V / 5V 0.85V / 0.6A Buck B 2 VCC_PSINTLP I2C Optional 0x00 1.8V / 1.1A VCCAUX Buck C 3 VCCADC, VCCAUC_IO Sequencer EN
Slide 16: Discrete vs PMIC Module
Discrete vs PMIC Module Discrete Solution Size: Width to Height ratio: 8.7 x 16.7 cm; Total Area Used: 145.3 cm²; PMIC Module Solution Size: Width to Height ratio: 4 x 3 cm; Total Area Used: 12 cm²; PMIC Module Solution Saves Up to 90% of board Space Discrete
Slide 17: Powering FPGA/DSP/SOC
Powering FPGA/DSP/SOC FPGA Power Constraints: • High Current Rails • Low Core Voltages • Large, complex power trees • Fast load transients • Heat dissipation Designers need: • Simple designs • Small solution size • Flexible designs • Precise voltage regulation • High efficiency
Slide 18: MPM54322/532 – 3A, 3A / 6A / 12A Power Module
MPM54322/532 – 3A, 3A / 6A / 12A Power Module Key Advantages: • Input range: 2.85V - 16V; • Output range: 0.4V - 3.8V; • Output current • MPM54322: dual 3A; parallel for 6A • MPM54532: dual 6A; parallel for 12A • Remote sense for both channels • Interleaved dual phase operation • Accurate I2C teleme
Slide 19: FLEX Power Sequence Control
FLEX Power Sequence Control MPM54322 uses MPS patented Flex Power Sequence control to better control the order in which the different power rails are initiated. This sequence control scheme uses a master-slave structure where the control signals of all the power management ICs (PMICs) are connected
Slide 20: Simplifying Design with MPS – Easy programming with VBPro
Simplifying Design with MPS – Easy programming with VBPro 4 Features: • Supports I2C and PMBus standard protocol • Tips for parameter configuration • Monitor real-time data (VIN, VOUT, IOUT, temp) • Waveforms of the main signals • Evaluate MPS devices in offline mode Fast evaluation and prototyping
Slide 21: Customize your design – Start-up
Customize your design – Start-up *Note – depending on the IC the menu names can be different* Test conditions: VIN = 12V; VOUT 1 = 0.85V; VOUT 2 = 0.85V; • VOUT 1 Soft-start time = 1ms; • VOUT 2 Soft-start time = 14ms; Set up algorithm for MPM54322: • Launch MPS Virtual Bench GUI; • Scan for connect
Slide 22: Customize your design – Start-up
Customize your design – Start-up Test conditions: VIN = 12V; Vout 1 = 0.85V; Vout 2 = 0.85V; tsoft-start 1 = 1ms; tsoft-start 2 = 14ms;
Slide 23: Customize your design – Shut down
Customize your design – Shut down *Note – depending on the IC the menu names can be different* Test conditions: VIN = 12V; VOUT 1 = 0.85V; VOUT 2 = 0.85V; • VOUT 1 Soft-Stop time = 1 ms; • VOUT 2 Soft-Stop time = 4 ms; Set up algorithm for MPM54322: • Launch MPS Virtual Bench GUI; • Scan for connect
Slide 24: Customize your design – Shut down
Customize your design – Shut down Test conditions: VIN = 12V; Vout 1 = 0.85V; Vout 2 = 0.85V; tsoft-stop 1 = 1ms; tsoft-stop 2 = 4ms;
Slide 25: Powering FPGA/DSP/SOC
Powering FPGA/DSP/SOC FPGA Power Constraints: • High Current Rails • Low Core Voltages • Large, complex power trees • Fast load transients • Heat dissipation Designers need: • Simple designs • Small solution size • Flexible designs • Precise voltage regulation • High efficiency
Slide 26: Main FPGA Power Rails & Requirements
Main FPGA Power Rails & Requirements
Slide 27: COT Control vs Industry Standard - Faster Transient
COT Control Vs Industry Standard - Faster Transient Current Mode Control Constant-On-Time Control Multiple pulses reduce the delay
Slide 28: MPM54322 Transient Response
MPM54322 Transient Response Test conditions: Vpp = 45 mV VIN = 12V; VOUT = 0.85V; Load slammer Slew Rate = 130 A/μs; Iload = 0 – 1.5A (0 – 50% IMAX) ΔVOUT = 45 mV Output capacitors: • Vout1 = 0.85V (2x 47uF) • Vout2 = 1.1V (2x 47uF) Key Advantages: • Reduced Output Capacitance • Fast Transient respo
Slide 29: Powering FPGA/DSP/SOC
Powering FPGA/DSP/SOC Power Constraints: • High Current Rails • Low Core Voltages • Large, complex power trees • Fast load transients • Heat dissipation Designers need: • Simple designs • Small solution size • Flexible designs • Precise voltage regulation • High efficiency
Slide 30: MPM54313 - 3 x 3A Power Module (Ideal for Optical Port Power)
MPM54313 - 3 x 3A Power Module (Ideal for Optical Port Power) Key Advantages: Sampling Single-Stage Solution • Industry First Module for Optical Power EN PG • VIN Range: 4V to 18V 12V Input 3.3V/2A RX • VOUT: 0.5V-5.5V I2C MPM54313 3.3V/2A TX • Triple 3A Output Current 3.3V/2A Others • Two Parallel
Slide 31: Current Solutions for Powering 25W QSFP-DD/DD800
Current Solutions for Powering 25W QSFP-DD/DD800 1µH 12V Input 1µH Inductor 3.2x2.5mm 1µH Load 3.2x2.5mm Switch 5.4x5.7mm 10A POL 0.68µH Inductor 3x4mm 7x7mm Vcc1 400G Optical VccRx 25W-30W 10A Load VccTx 12V-3.3V, 10A Buck Converter Switch 3-Sets of LC Filters • 3-Stage Solutions: • Buck + Load Swi
Slide 32: MPS New Single Stage Solutions for Powering QSFP-DD
MPS New Single Stage Solutions for Powering QSFP-DD 12V Input VccTx MPM54313: MPM54313 12Vin, 3x3.3V/3A Output VccRx • Saves up to 65% board space; 8x9mm 400G Optical Vcc1 25W-30W • Uses 60% less BOM components; • Improves 1% system efficiency; • Single-Stage Solutions, directly takes 12V input • Ov
Slide 33: High Efficiency PMIC Modules
High Efficiency PMIC Modules Test conditions: VIN = 12V; • VOUT_A = 3.3V; • VOUT_B = 3.3V; • VOUT_C = 3.3V; Iload = 3A each channel; Total Power: 30W Room Temperature without Airflow; Test timing: 30+ minutes. Results: Name MPM54313 74.0 °C 74.0 °C 74.0 °C PCB 47.2 °C 47.2 °C 47.2 °C
Slide 34: Using PMIC Modules to improve power density
Using PMIC Modules to improve power density Power Constraints: Traditional Solutions PMIC Module Solutions • High Current Rails 1µH 3.2x2.5mm 1µH 1µH Inductor • Low Core Voltages Load 3.2x2.5mm 5.4x5.7mm 10A POL Switch MPM54313 0.68µH Inductor 3x4mm 7x7mm 12Vin, 3x3.3V/3A Output 8x9mm • Large, compl
Slide 35: Simplifying Design with MPS – PMIC Modules
Simplifying Design with MPS – PMIC Modules 1A 2A 3A 5A 10A+ 25A+ Coming Soon Coming Soon 6-45V, Dual 12A, <45V 4-45V, Dual 3A Parallelable Step-Down Power Module Buck Power Module 10x10x4.4mm, LGA 15x30x5.2mm, BGA MPM54304 MPM54504 MPM81204 MPM82504 2A, 2A, 3A, 3A 3-16V, Quad 5A 4-16V, Dual 12A, Dua
Slide 36: Q&A
Q&A mMmPrS