Formfactor, Inc. · NASDAQ:FORM
Formfactor — Semicon Korea 2016
18 slides from Formfactor's conference presentation, Jan 28, 2016
Slide 1: Vertical MEMS Probe Technology For Advanced Packaging
3D and MEMS Vertical MEMS Probe Technology For Advanced Packaging Amy Leong Senior Vice President, Marketing FormFactor Inc 1/28/2016
Slide 2: Agenda/Outlines
Agenda/Outlines • Rapid recent adoption of advanced packaging – Copper pillar and 2.5D/3D ICs – Customers relying on “more-than-Moore” advances • Presents significant challenges for wafer test and probe – Layouts are fully-populated 2-D arrays at <100um pitch – Contacts are delicate structures made
Slide 3: Transistor Scaling and Cost Reduction Trajectory Slowing
Transistor Scaling and Cost Reduction Trajectory Slowing “More-Than-Moore” Advanced Packaging Accelerating Below 10nm I/Os per cm2 20,000 Flip Chip 3D/2.5D Technology 10,000 Accelerating Leading Edge FinFET 1500 Wire Bonding 500 90 65 40 28 20 14 10 Tech Node (nm) 3
Slide 4: 2.5D IC and 3D IC Technologies are growing
2.5D IC and 3D IC Technologies are growing 2.5D/3D IC Package Production Forecast, Units, Millions CAGR 3D IC Memory and Logic 3D IC Memory 2.5D Source: Gartner, New Venture Research, McKinsey 4
Slide 5: 3D IC/2.5D Silicon Interposer Application & Device Drivers
3D IC/2.5D Silicon Interposer Application & Device Drivers Cu Pillar Enables 3D Fine-pitch Memory Interface and 2.5D Silicon Interposer • High-end Applications – Servers – High-end computing – Data center – Game consoles • Devices – FPGA – High-end Memory • HBM • Wide I/O • HMC – GPUs – CPUs Samsung
Slide 6: Wafer Probing Challenging
Wafer Probing Challenging Smaller Cu Pillars at Finer Pitch Require High Contact Precision and Low Force Solder Cu Pillar Dimension Roadmap Bump Pitch (um) 150um 130um 100um 80um 60um 40um Diameter (um) 80 um 60-70um 40-50um 25-30um 20-25um 20-25 um Height (um) 80 um 75 um 60 um 50 um 40 um 35 um 80
Slide 7: Cu Pillar Probe Mark Photo Gallery
Cu Pillar Probe Mark Photo Gallery No Pass Misaligned Probe Tip Pass Good Probe Mark on 30um Cu Pillar No Pass Cu Pillars with Sheared No Pass Solder Cap Probe force too high 7
Slide 8: Mechanically Formed Vertical Probes Give Way to MEMs Probes Below 100um Pitch
Mechanically Formed Vertical Probes Give Way to MEMs Probes Below 100um Pitch • Mechanical Tolerances for Stamped probes are inferior to MEMs structures • Guide Plate Mechanical Drilling is Inferior to MEMs Guide Plate Formation Technology • Tip Geometries are Poorly Controlled by Stamping and Formi
Slide 9: Dimensional Control Improved With MEMS-Based Fabrication Processes
Dimensional Control Improved With MEMS- Based Fabrication Processes Mechanically Formed MEMS Fabbed • Raw “as-fabbed” distributions • Indicative of natural process capability 9
Slide 10: For Sub-100um Pitches, MEMS-based Dimensional Control Offers Significant Advantages
For Sub-100um Pitches, MEMS-based Dimensional Control Offers Significant Advantages Reduction in as-produced dimensional errors can be used in different ways – Larger probe for a given design pitch - for 80um example above, D=25um • Better electrical performance (current, impedance) and longer lifet
Slide 11: Composite MEMS Structure Helps to Carry More Current Through An Ever-Shrinking Probe Cross-Section
Composite MEMS Structure Helps to Carry More Current Through An Ever-Shrinking Probe Cross-Section FormFactor Composite MEMs Probe • Geometries are getting smaller, while current densities are increasing • Composite MEMS probes made from different material – Analogous approach to composite design in
Slide 12: Maximum Allowable Current (MAC) vs Current Carrying Capability (CCC)
Maximum Allowable Current (MAC) vs Current Carrying Capability (CCC) MAC to CCC Ratio is not constant, is probe architecture dependent* Current Capability (A) MAC represents actual current that 1.2 probe can safely deliver, a more Current Carrying Capability (A) Max Allowable Current (A) reliable sp
Slide 13: These 2-D Layouts are Populated With Structures That Require Low Probe Forces
These 2-D Layouts are Populated With Structures That Require Low Probe Forces • Typical SnAg damage (d) requirement <50% of pillar diameter (D) – Additional requirements on probe mark topology (notching, smearing, etc.) – Imposed by assembly constraints (reliability) – Met with probe forces of <2-3g
Slide 14: At Low Force, Probe Material and Geometry Optimization Required for Stable Electrical Contact
At Low Force, Probe Material and Geometry Optimization Required for Stable Electrical Contact Source: Data from Wittig et al, SWTW 2011 14
Slide 15: There are More and More of These Probes in Each Card
There are More and More of These Probes in Each Card Probe per card (Normalized to Q4’2014) 3 2.5 2 1.5 1 Q4'2014 Q1'2015 Q2'2015 Q3'2015 • Two primary drivers/causes (roughly equal influences) 1. Increased parallelism – more DUTs for test cost reduction 2. Increased probes per DUT – more test conte
Slide 16: Probe Assembly Throughput Is Becoming An Issue for Probe Card Cycle-time
Probe Assembly Throughput Is Becoming An Issue for Probe Card Cycle-time @ 80um CuP Pitch Vertical Probe Assembly Throughput Decreases with Slimmer Probes 2000 Probe Head Assembly Is Becoming the Critical Typical Manual Probe Head ASsembly 1800 Path to Probe Card Cycle-time As Pin 1600 Throughput (P
Slide 17: Time-to-Volume Ramp-up @ 80um CuP Pitch
Time-to-Volume Ramp-up @ 80um CuP Pitch What if 5 or 10 cards are needed in a week to address peak demand? 100 With manual probe head assembly, to 90 ship 10 units of 30k-pins 80um-pitch Concurrent Assembler Shifts probe cards in a week, ~100 concurrent 80 assembler shifts are required!!! 70 60 50 4
Slide 18: Summary
Summary • Static trend of grid-array packaging pitch is turning into rapid reduction • 150um -> 130um -> 100 -> 80um -> sub-50um • Grid-array assembly pitch roadmap is converging with 2.5/3D TSV Cu Pillars • pitch, bump geometry, bump material sets • Conventional technology can’t keep up with the cu