Slide 1: Corporate Overview for Investors
Corporate Overview for Investors December 2024
Slide 2: Forward-Looking Statements
Forward-Looking Statements This presentation contains forward-looking statements, including, but not limited to, statements regarding Synopsys, Inc.’s (Synopsys, we or our) statements regarding short-term and long-term financial targets, expectations and objectives including, among others, our long-
Slide 3: Empowering Customers' Innovation
Empowering Customers’ Innovation PURPOSE MISSION VALUE PROPOSITION To power innovation today Empower technology Maximize customers’ that ignites the ingenuity innovators everywhere R&D capabilities and multiply of tomorrow their productivity © 2024 Synopsys, Inc. 3
Slide 4: Powering the Era of Pervasive Intelligence
Powering the Era of Pervasive Intelligence Artificial intelligence Silicon proliferation Software-defined systems Exponential productivity More silicon content New applications, and efficiency gains everywhere new methodologies Overcoming energy Addressing productivity Enabling increased complexity,
Slide 5: Synopsys: The Market & Technology Leader
Synopsys: The Market & Technology Leader FY241 FY25 Targets2, 3 Broad Product Revenue: $6.127B $6.745B – $6.805B Portfolio Growth Rate: 15.2% ~10-11% Electronic Design Non-GAAP Operating Margin: 38.5% ~40.0%* Automation (EDA) *Midpoint of range Semiconductor Intellectual Non-GAAP Diluted EPS: $13.20
Slide 6: Long-term Financial Objectives on a Combined Company Basis
Long-term Financial Objectives on a Combined Company Basis1 Our combined company long-term, multi-year objectives are: Revenue Margin Earnings Industry-leading double-digit Long-term non-GAAP Non-GAAP growth operating margins EPS growth in the • Design Automation: double digits in mid 40s high-teens
Slide 7: Global Value Chain—2024E
Global Value Chain—2024E EDA & IP—At the Heart of Accelerating Electronics Innovation EDA & IP Embedded Software Foundry Semiconductors Electronic Systems $21.1B $16.8B $147B $676B $1.98T Sources: ESD Alliance, Ipnest, MarketsandMarkets, IC Insights (2024) © 2024 Synopsys, Inc. 7
Slide 8: Industry-Leading, Full-Stack EDA Solution
Industry-Leading, Full-Stack EDA Solution Industry AI-powered Leader Systems Architecture #1 in EDA, Leader in digital design and verification Design Capture Over 1200 tape-outs at 16nm and below* Hyperconverged Verification Implementation Leader in GPU-accelerated analog verification Signoff Gold s
Slide 9: First to Deliver AI-Powered EDA
First to Deliver AI-Powered EDA AI-powered Generative Collaborative Systems Architecture Generative AI Since 2023 Generate RTL, Test Bench, Expert answers, Formal Collateral expert root causes Design Capture Hyperconverged Verification AI-driven Design.da Silicon.da Fab.da Implementation data analyt
Slide 10: Synopsys Digital Design
Synopsys Digital Design SYNOPSYS DIGITAL DESIGN FAMILY • Flagship tools: synthesis, P&R, signoff SYSTEM DESIGN Fusion • Fusion of algorithms, engines, data model 3DIC Compiler Architecture • Two fusion types: test and signoff DIGITAL DESIGN RTL Architect • Industry-unique Fusion Compiler Test Fusion
Slide 11: Synopsys Verification
Synopsys Verification SYNOPSYS VERIFICATION FAMILY Complete product family with leading Best-in-Class products in all categories, hardware- Verification based and software-based Planning & Coverage Verdi® Fastest Highest-performance engines Engines accelerate time-to-market Platform VC Architect Spy
Slide 12: Efficient Design Implementation for Multi-Die Systems
Efficient Design Implementation for Multi-Die Systems Optimize thermal, power, Architecture and performance with early Exploration exploration and partitioning Architecture Multi-Die/Package Exploration Co-Design Rapid software development Software Dev. Thermal/ SW Dev. & and validation with high-ca
Slide 13: Broadest & Most Advanced IP Portfolio
Broadest & Most Advanced IP Portfolio 25 years of investment & commitment Security IP Processor IP #2 IP provider worldwide Other IP Foundation IP Leader in Foundation IP Custom Logic Leader in Interface IP Interface IP Growing Processor IP portfolio with ARC-V Increase productivity and reduce desig
Slide 14: Broadest and Most Comprehensive IP Portfolio
Broadest and Most Comprehensive IP Portfolio SYNOPSYS IP PORTFOLIO Foundation IP, Software Broadest analog, interfaces, Portfolio security, processors, DDR/HBM PCIe HDMI/DP USB 10G to Die-to-Die subsystems C/D-PHY M-PHY PHY PHY PHY PHY 224G PHY PHY CPUs Safety MPUs Security DDR/HBM PCIe HDMI/DP USB
Slide 15: GAAP to Non-GAAP Reconciliation
GAAP to Non-GAAP Reconciliation1 Earnings Per Share—Full Fiscal Year 2025 Targets Range for Fiscal Year Ending October 31, 2025 Low High Target GAAP earnings per diluted share attributed to Synopsys $ 10.42 $ 10.63 Adjustments: Amortization of acquired intangible assets 0.32 0.29 Stock-based compens
Slide 16: GAAP to Non-GAAP Reconciliation
GAAP to Non-GAAP Reconciliation1 Operating Margin—Midpoint of Fiscal Year 2025 Targets Fiscal Year Ending October 31, 2025 At midpoint of revenue and expense guidance ranges GAAP operating margin 26.9 % Amortization of acquired intangible assets 0.7 % Stock-based compensation 12.4 % Target non-GAAP
Slide 17: ESG Highlights
ESG Highlights ENVIRONMENT SOCIAL GOVERNANCE Addressing our footprint and Empowering our talent through a culture Standing by our commitment to enabling our customers to innovate of innovation, inclusion, and respect integrity as a hallmark of our success for a greener world Received 58 awards in 14
Slide 18: Thank You
Thank You