Photronics, Inc. · NASDAQ:PLAB
Photronics — ARS 2003
28 slides from Photronics's conference presentation, June 2003
Slide 1: Merchant Reticle Business Dynamics in the Deep Sub-wavelength Era
Merchant Reticle Business Dynamics in the Deep Sub-wavelength Era Or Blame it all on K1 Dan Del Rosario CEO – Photronics Inc
Slide 2: Observations on Rayleigh's Equation
Observations on Rayleigh’s Equation λ Resolution X NA Resolution = K1 X K1 = NA λ • When λ decreases, K1 increases • When NA increases, K1 decreases • When K1 = 0.7 - Reticle Company Stock prices go skyward to heaven • As K1 approaches 0.6 - Reticle Companies deal with Lithographers “tricks” • As K1
Slide 3: Agenda
Agenda • Confronting the reticle cost “issue” – Historical perspective – The 130nm inflection point • The case for integrating the lithography plane • Summary
Slide 4: Are Reticle Costs Inhibiting Design?
Are Reticle Costs Inhibiting Design? New model needed for mask industry, analyst says By Mark LaPedus, Semiconductor Business News Feb 27, 2003 (6:39 AM) SANTA CLARA, Calif.--The photomask industry needs a new business model, as the price for a reticle could soar to more than $5 million per unit by
Slide 5: Are Development Costs Stifling Innovation?
Are Development Costs Stifling Innovation? Source: Synopsis
Slide 6: Historical Perspective: The 350nm Era
Historical Perspective The 350nm Era
Slide 7: Merchant Reticle Business
Merchant Reticle Business Investment for a Redundant Hallmarks of Era Reticle Fab (2lines) • Most leading customers are printing near or K1=.6-.8 above wavelength 350 nm Node • Capability improvements mostly embedded in tools Critical Tools Req’d 10 Tool Capex ($MM) 22 • Reticle Suppliers arrange Mu
Slide 8: Merchant Competency Model at 350nm Node
Merchant Competency Model at 350nm Node Low Defect Processing Critical Product Metrics Control Resist Patterning and Processing Absorber Etching Supplier Competence •Materials •Writers •Defect Detection •Repair
Slide 9: Meeting Customer Needs at 350nm Node
Meeting Customer Needs at 350nm Node • Initial I-line push quickly migrated to 248nm • E-beam and laser writers perceived as interchangeable • Binary at 248 required less OPC after wavelength change – 2 basic processes needed– e-beam and I-line laser • Competing mask inspection tools proved acceptab
Slide 10: The 130nm Inflection Point
The350130nm nm Node Inflection Point Key Takeaways 2 lines 2 lines • Capex increase to ~4.5X 350 nm Node 130nm Node • Average Critical tool cost Critical Tools Req’d 10 Critical Tools Req’d 22 increase ~2.1X Tool Capex ($MM) 22 Tool Capex ($MM) 104 • Writers and defect Facility Class 10 Facility Cla
Slide 11: Other Dynamics Impacting Inflection Point
Other Dynamics Impacting Inflection Point Last Downturn Current Downturn Global Stability Geopolitical Instability Killer App’s Existed No Killer App Design Shrinks Complex Process Challenges Increased Design Activity Costly Design Limits Growth Industry Maturing Industry
Slide 12: Merchant Competency Model at 130nm Node and Beyond
Merchant Competency Model at 130nm Node and Beyond Reticle Yield Defect Free Processing Critical Product Improvement Metrics Control Product Specific Mfg. Throughput Patterning Tool Absorber and/or Resolution Substrate Fidelity Etching Product Differentiation Modeling and Advanced Opportunity Simula
Slide 13: Meeting Customer Needs at 130nm Node
Meeting Customer Needs at 130nm Node • 248 broadly used, 193 slow to develop momentum • Writer fidelity becomes part of process of record – Positive and negative CAR • Reticle suppliers develop competency in at least 2 embedded PSM to complement binary offering – Some limited hard shifter demand • M
Slide 14: Is 65nm the Next Inflection Point?
Is 65nm the Next Inflection Point? 600 350nm Node Critical Tools Req’d 10 500 Tool Capex ($MM) 22 130nm Node Facility Class 10 Critical Tools Req’d 22 Tool Capex ($MM) 104 400 Linewidth (nm) Facility Class 1 (CAR Capable) 65nm Node Critical Tools Req’d 28 300 Tool Capex ($MM) 218 Facility Class 1 (C
Slide 15: Managing Costs
Managing Costs
Slide 16: What Should be Done Near Term about Reticle Costs?
What Should be Done Near Term about Reticle Costs? • For large volume devices, MPU, DRAM and ASIC runners – – NOTHING!!! We believe leading edge reticles are fairly valued • Low volume and ASIC prototypes – Cost mitigating strategies must be investigated and implemented to rescue the business model
Slide 17: Examples of Near Term Cost Mitigating Strategies
Examples of Near Term Cost Mitigating Strategies • Foundry shuttle is one example – Does not work well for IDM environment due to availabilty of enough designs to leverage the concept – Reticles more complex and challenging due to patterning imbalance and CD linearity issues – Layer revisions add co
Slide 18: ASIC Options
ASIC Options Via1 Via1 Contact Contact Contact Contact Via2 Via2 Small Field Approach Multi-Level Approach Photronics is working with key customers to realize savings using these options
Slide 19: The Case for Integrating the Lithography Plane
The Case for Integrating the Lithography Plane
Slide 20: What Is the Lithography Plane?
What Is the Lithography Plane? Logical Physical Wafer Image Design Mask Design Formation Design Capture Place & Route Data Fracture Illumination Strategy Simulation/ Verification, Mask write Emulation Extraction and Resist Analysis Defect Inspect Synthesis Etch Resolution Repair Enhancement High K1
Slide 21: Integrating for Low K1 Environment
Integrating for Low K1 Environment •Eliminate “throw over the wall” mentality •Increase communication between vested interests •Eliminate the silos Logical Physical Wafer Image Design Mask Design Formation Design Capture Place & Route Data Fracture Illumination Wafer Logical Physical Strategy Simula
Slide 22: Low K1 Environment Increases Feedback Need
Low K1 Environment Increases Feedback Need Wafer Logical Physical Tested Mask Image Design Design Devices Formation
Slide 23: Integrated Lithography Plane
Integrated Lithography Plane Wafer Logical Physical Tested Mask Image Design Design Devices Formation
Slide 24: What are Some of the Benefits?
What are Some of the Benefits? • More manufacturable designs – Equitable sharing of error budget • Lower total cost – Inproved yields • Mask and wafer • Continued scalabilty • Improved time to market
Slide 25: How Difficult is this To Do? But at What Relative Cost?
How Difficult But at is this toCost? What Relative Do? IDM with advanced captive reticle supply IDM with advanced merchant reticle supply Foundry with advanced captive reticle supply Foundry with advanced merchant reticle supply Relative Difficulty Relative Cost Breadth of Product Offering
Slide 26: Who Will Drive This?
Who Will Drive This? • Technology challenges and economic forces have collided at the 130nm technology node and a new paradigm is required. • The timing has never been better for a consortium to begin integrating the lithography plane. • Who will step up to capitalize on this opportunity? • Photroni
Slide 27: Summary
Summary • The costs of bringing an idea to silicon at advanced nodes has sky rocketed • The ramp for new designs to allow for adequate yield learning has slowed – Technology challenges, yield issues, weak economy • The ASIC model can benefit from reticle cost mitigation strategies • Intense and last
Slide 28: Thank You
Thank You • Mart Graef from Philips for the Immersion Scanner cartoon • Organizers of ARS 2003 for this speaking opportunity • Audience for your attentiveness