Asml Holding Nv · EURONEXT:ASML
Asml Holding Nv — Investor Day (November 2018)
27 slides from Asml Holding Nv's investor day presentation, Nov 9, 2018
Slide 1: Industry Roadmap and Technology Strategy
Public Industry Roadmap and Technology Strategy Martin van den Brink President and Chief Technology Officer
Slide 2: Overview
Overview Public Slide 2 8 November 2018 • Moore’s law innovation continues, driven by multiple engines of performance Industry scaling which is expected to accelerate over the next decade Innovation • Continued process technology innovation attracts new applications and increases wafer volume • Cust
Slide 3: Major trends in semiconductor-enabled computing
Major trends in semiconductor-enabled computing Public Slide 3 8 November 2018 SoC Applications CPU NPU Digital GPU Signal Processor Moore’ Moore’s Law Fast Performanc Performance data Algorithms Cost Cost Data Memory & Storage Source: Sumit Sadana, Micron, Micron Investor Day, May 2018
Slide 4: Public Slide LPDDR4 A10 Circuit die die packag Dimensional scaling e LPDDR4 Scaling 3D,
Public Slide 4 8 November 2018 LPDDR4 A10 Circuit die die packag Dimensional scaling e LPDDR4 Scaling 3D, System- LPDDR4 Patterning and on-chip and die LPDDR4 die circuity shrink advanced packaging Architecture DSP/ Samsung: gate-all- NPU scaling around post 7 nm! Solution optimization Source: Intel
Slide 5: Chipmakers accelerate performance for the next decade
Chipmakers accelerate performance for the next decade¹ Process technology innovation accounts for 30% on par with Moore’s prediction2 Public Slide 5 8 November 2018 Improvement opportunities for the next decade 100% >2X 3D stacking /2.4 years 80% Multi-chip architecture Memory integration ormance/Wa
Slide 6: Customers' roadmaps show continued need to shrink
Customers’ roadmaps show continued need to shrink ASML’s roadmap aligned to deliver solutions Public Slide 6 8 November 2018 DRAM Logic CAGR CAGR High: 10% High: 28% Low: 5% Low: 10%
Slide 7: Innovation attracts new applications
Innovation attracts new applications Starting at trailing nodes and migrating fast to leading edge Public Slide 7 8 November 2018 7nm 100.0 10nm [M/mm^2] 20nm 28nm Density 10.0 Google TPU 45nm Breeding Transistor iPhone Ax BitMain ASIC Ground 1.0 2009 2011 2013 2015 2017 2019 2021 Year of Introducti
Slide 8: Combined EUV, High NA, DUV and holistic solutions needed to support shrink
Combined EUV, High NA, DUV and holistic solutions needed to support shrink in the next decade Public Slide 8 8 November 2018 Minimum resolution continues to shrink … … and Logic takes over from DRAM in overlay scaling 100 MPU Mix&match Applications ArFi lithography Foundry On Product Overlay [nm] Si
Slide 9: Customers' scaling roadmaps continue
Customers’ scaling roadmaps continue Public EUV Production High NA Production Slide 9 Insertion Window Insertion Window 8 November 2018 2017 2018 2019 2020 2021 2022 2023 2024 2025 Node name Logic Logic 10nm 7nm 5nm 3nm 2nm Node name Performance Memory DRAM 1X 1Y 1Z 1 1A 1B Storage Min. 1 ⁄ 2 pitch
Slide 10: Our strategy to enable shrink
Our strategy to enable shrink Public Slide 10 8 November 2018 • Strengthen Litho+ leadership with in device metrology enabling correction of Holistic Litho process induced overlay extension • Build a winning position in Pattern Fidelity Control leveraging e-beam metrology and inspection combined wit
Slide 11: ASML's Holistic Lithography roadmap
ASML’s Holistic Lithography roadmap optimize patterning performance through patterning, metrology and computational integration Public Slide 11 8 November 2018 Other patterning tools with advanced capability verlay and focus) resist and Process Window process Control EPE Window Optical and E-beam li
Slide 12: Main factors for continued shrink
Main factors for continued shrink Edge placement error and shrinking litho critical dimension Public Slide 12 8 November 2018 Edge placement error (EPE) and litho critical …and shrink requires ever tighter dimension (CD) main patterning parameters… requirements node x node x+2 Intended cut X Smaller
Slide 13: Applications Product Roadmap
Applications Product Roadmap 2017 2018 2019 2020 2021 2022 1 Pattern Fidelity Control Litho InSight Litho Overlay & Focus control Control Edge Placement Control Yield Aware Control erface ol Matching BMMO2 Layout independent matching XOPO EUV-DUV on product matching Next Increase adjustable Int Cont
Slide 14: Better accuracy of lithography models by deep learning
Better accuracy of lithography models by deep learning Enabled by fast e-beam metrology and physical based models Public Slide 14 8 November 2018 Example 1 Data-driven training based on fitting ASML Deep spec and wafer measurements learning model Accuracy Large volume wafer metrology data, further e
Slide 15: YieldStar In-Device Metrology improves electrical yield
Yield Star In-Device Metrology improves electrical yield Compared to SEM on word line DRAM layer Public Slide 15 8 November 2018 Wafers/Lots Wafer/Lots Controlled with Controlled with YieldStar IDM High Voltage SEM Electrical Resistance Test—B A-B = 0  Zero Overlay A DRAM Memory Cell Electrical A
Slide 16: Applications: expanding solution space
Applications: expanding solution space Drives growing product portfolio Public Slide 16 8 November 2018 Computational E-Beam Metrology Optical Metrology Process Control Lithography & Inspection • Deep learning and fast • Entering growing after- • Expanding CD-SEM • Process control e-beam metrology e
Slide 17: DUV Product Roadmap
DUV Product Roadmap Extending throughput for cost reduction and overlay for yield improvement Public Slide 17 8 November 2018 Key immersion innovations in alignment, wafer table and level sensor synced with NXE for tighter overlay matching 2017 2018 2021 2022 …. 2025 ArFi NXT:1980i NXT t 1.35 NA 1.5
Slide 18: NXT:2000i performance exceeding expectations
NXT:2000i performance exceeding expectations As measured on multiple systems shipped Public Slide 18 8 November 2018 Alignment sensor Additional features • More process robustness • Improved grid setup for better • Higher yield overlay and calibration • Improved projection lens modeling and heating
Slide 19: DUV: mix and match with EUV and drive to perfection
DUV: mix and match with EUV and drive to perfection Public Slide 19 8 November 2018 Innovation Leadership Cost & uptime Installed Base Management • Leadership in Immersion with the NXT:2000i • NXT installed base has demonstrated • Multiple opportunities to generate service featuring a next generatio
Slide 20: EUV: deliver performance for volume manufacturing and extend roadmap
EUV: deliver performance for volume manufacturing and extend roadmap for continued cost effective shrink Public Slide 20 8 November 2018 3400B uptime improving to >90% Extension to 3 nm node, through Acceleration improvements to for 2018/ 2019 HVM: Modular EXE5000 common subsystems, <1.5nm overlay a
Slide 21: NXE:3400 Matched Machine Overlay
NXE:3400 Matched Machine Overlay Public Performance well below NXE:3350 and specifications Slide 21 8 November 2018 2.5 Average NXE:3350 Spec [nm] 2.0 Overlay 1.5 Machine 1.0 Matched 0.5 0.0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 systems
Slide 22: Driving commonality between High NA and 0.33 NA
Driving commonality between High NA and 0.33 NA Reduces risk, lowers cost and allow 0.33 extension Public Slide 22 8 November 2018 Illuminator Projection Mirror ‘rework’ Source Reticle Masking Unicom Reticle Stage Reticle Handler Optics Optics process at Zeiss Specific Common Mechanical Broad band E
Slide 23: Larger NA results in higher effective throughput
Larger NA results in higher effective throughput1 2 Public Less number of Litho Etch steps and transmission improvement Slide 23 8 November 2018 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 1 1 1 1 2 1 2 2 2 3 3 3 1 2 1 1 1 2 3 2 3 2 2 1 1 1 1 2 2 3 1 3 1 3 1 Effective throughput = throughput /
Slide 24: EUV: two accelerated development programs in parallel
EUV: two accelerated development programs in parallel after having achieved volume production feasibility metrics Public Slide 24 8 November 2018 0.33 NA Summary High NA summary • ASML and supply chain preparing for planned • System design completed, module design progressing and key production ramp
Slide 25: Summary
Summary Public Slide 25 8 November 2018 • Moore’s law innovation continues, driven by multiple engines of performance Industry scaling which is expected to accelerate over the next decade Innovation • Continued process technology innovation attracts new applications and increases wafer volume • Cust
Slide 26: Forward Looking Statements
Forward Looking Statements Public Slide 26 This document contains statements relating to certain projections, business trends and other matters that are forward-looking, including statements with respect to expected trends and outlook, 8 November 2018 strategy, bookings, expected financial results a
Slide 27: Investor Day ASML SmallTalk 2018 Veldhoven
Public INVESTOR DAY ASML SMALLTALK 2018 VELDHOVENE