Marvell Technology, Inc. · NASDAQ:MRVL
Marvell Technology — Linley Fall Processor Conference 2022
24 slides from Marvell Technology's conference presentation, November 2022
Slide 1: DPUs: Where Will They Go Next?
DPUs: Where Will They Go Next? Manoj Roge Sr Director, Processor Business Unit, Marvell Linley Fall Processor Conference, November 2022
Slide 2: Forward-looking statements
Forward-looking statements Except for statements of historical fact, this presentation contains forward-looking statements (within the meaning of the federal securities laws) including, but not limited to, statements related to market trends and to the company’s business and operations, business opp
Slide 3: Agenda
1 System trends OCTEON®: 2 The original DPU platform Agenda 3 DPU use cases OCTEON® solutions 4 and benchmarks © 2022 Marvell. All rights reserved. 3
Slide 4: DPU need driven by data centric applications
DPU need driven by data centric applications Data Wired processing Wireless 100110 DPU 101011 Data Center DPU OCTEON® Automotive Multiple end markets for OCTEON® DPU © 2022 Marvell. All rights reserved. 4
Slide 5: Future Data Centers
Future Data Centers: Composable, software-defined, hardware-accelerated Network Protocols: Ethernet, RDMA, CXL Compute rack Storage rack Accelerator rack GPU rack Google Workspace Dropbox AI Workload DPUs manage composability, accelerate workloads © 2022 Marvell. All rights reserved. 5
Slide 6: DPU in every server!
DPU in every server! Microsoft Amazon H2RC’16: “CPU is complexity offload engine for FPGA!”1 2019 re:Invent – “All new instance launches use the Nitro System”2 Meta Google “Microservices spend as few as 18% of CPU cycles executing “Data center Tax” can comprise nearly 30% of cycles4 core application
Slide 7: Transition to virtualization
Transition to virtualization Traditional wireline appliances Data center DPU X86/ARM Accelerator PCIe Traditional RAN/carrier Data center vRAN © 2022 Marvell. All rights reserved. 7
Slide 8: Applications require versatile mix of accelerators
Applications require versatile mix of accelerators Data center 5G Infrastructure Networking Storage Security AI/ML Baseband Security AI/ML Networking © 2022 Marvell. All rights reserved. 8
Slide 9: OCTEON: the original DPU platform
OCTEON®: the original DPU platform OCTEON® OCTEON® OCTEON® OCTEON® OCTEON® OCTEON® multicore Fusion TX TX2 10 Next Gen LiquidIO® 2005 2010 2012 2015 2019 2021 Industry’s 1st DPU First Marvell 6th Generation 7th Generation Arm DPU Marvell DPU Marvell DPU Enterprise Cloud Wireless Radio Edge Auto © 20
Slide 10: OCTEON architectural overview
OCTEON® 10 architectural overview Scalable Compute § ARMv9.0 64-bit Neoverse N2 cores Ethernet Security OCTEON® 10 to 50 GbE offload SerDes QSGMII Memory subsystem and connectivity USGMII USXGMII AES SVE2 AES SVE2 FPU FPU § 1MB/core L2, 2MB shared last level cache NIX SMMU SMMU I/O and Co-Processor
Slide 11: Platform strategy
Platform strategy § DPU PCIe cards § Robust and open source + software support Virtualization § Partner ecosystem APIs and frameworks Apps and accelerators © 2022 Marvell. All rights reserved. 11
Slide 12: Marvell PCIe accelerator cards
Marvell PCIe accelerator cards CN98 CN106 CN103 Part Number WA-CN98-A1-PCIE-4P100-R1 WA-CN106-A1-PCIE-2P100-R1 WA-CN103-A0-PCIE-4P50-R1 Port config 4x 100G PAM4 2x 100G PAM4 4x 50G PAM4 PCIe Gen4 Gen5 Gen5 Core 36x ARM V8 TX2 24x ARM V9 N2 8x ARM V9 N2 Availability Now 1Q CY23 Announcing General ava
Slide 13: CN106 based PCIe card
CN106 based PCIe card Part number WA-CN106-A1-PCIE-2P100-R1 Availability Date SDK11 support Now Features Capability Order in qty Nov 2022 2 x 100G PAM4 I/O PCIe Gen 5 6 x 40bit DDR5@ 5200MTs Memory w/ECC, 8-40GB total 24 ARM N2, 2.5GHz, ARM cores 100 SPECINT2017 Performance 120 MPPS, 120Gbps IPSEC,
Slide 14: DPU solutions
DPU solutions Host application and VNFs Host software Virtualization runtime Host Standard APIs and frameworks Card Customer/ecosystem accelerator Workloads | accelerators | applications Ecosystem software L1 Network Security Storage Marvell stack stack stack stack PCIe card OEM server PCIe card Dis
Slide 15: Industry-leading 5G infrastructure portfolio
Industry-leading 5G infrastructure portfolio Four digital sockets Marvell is major provider of all Split-8 Split-7.x Split-6 Split-2 RF Front Digital Beam- Baseband Transport Core Antenna End Front End forming / / / Network (RFFE) (DFE) Low-PHY High-PHY Backhaul Radio Unit (RU) Distributed Unit (DU)
Slide 16: 5G O-RAN solution: open, scalable, best-in-class
5G O-RAN solution: open, scalable, best-in-class Host server Layer 2 and 3 processing OCTEON® FUSION To In-line layer 1 antenna processing © 2022 Marvell. All rights reserved. 16
Slide 17: Data Center use cases
Data Center use cases 1 Network offload 2 Storage offload 3 Security offload Accelerate networking functions Accelerate storage functions Isolate tenants from host Server Server Server VM VM VM VM VM VM VM VM VM VM VM VM OS OS OS DPU DPU DPU IPSec DPI Firewall vSwitch SDN RDMA NVMe controllers Encry
Slide 18: Enterprise use cases
Enterprise use cases SMB router, SDWAN, High-end router, Switch, WLAN controller gateway Firewall/security data plane Line card/controller Control and data plane Data plane only Control plane only © 2022 Marvell. All rights reserved. 18
Slide 19: Benchmarks
Benchmarks Compute Memory Packet Application performance subsystem processing benchmark § SPECINT2006 § LMbench § TestPMD § IPSec gateway § SPECINT2017 § Stream § L3 Forwarding § kTLS § Open offload § CoreMark § iPerf / Netperf § SNORT/Hyperscan § NVMEoF § ML Inference © 2022 Marvell. All rights res
Slide 20: 200Gbps open offload performance
200Gbps open offload performance § Full Firewall VM running on Host server Virtual Firewall § Marvell DPU as fast path engine - maintain Host server route/firewall cache based on OpenOffload CN98xx 2Ghz, 2x100G 64B 512B 1518B Data plane cores Mpps Gbps Mpps Gbps Mpps Gbps 2 3.54 2.38 3.54 15.1 3.46
Slide 21: Integrated ML engine
Integrated ML engine § Best-in-class DPU inferencing ‒ Directly in the data pipeline Inline ML engine ‒ Each ML tile contains private SRAM Shared/System memory ‒ Ultra low power § Up to 100x performance vs SW XBAR/Interconnect ‒ Supports Int8, FP16 ‒ Accelerated Tanh and Sigmoid activation functions
Slide 22: Summary
Summary Most widely deployed DPU, shipping since 2005 for data center, 1 enterprise and carrier use cases Software-defined infrastructure requires hardware acceleration – 2 OCTEON® portfolio has right accelerators to deliver best solution TCO Unified software stack built on open source frameworks an
Slide 23: Thank You
Thank You
Slide 24: Marvell
ia MARVELL Essential technology, done right™
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