Asm International N.v. · EURONEXT:ASM
Asm International — Investor Day (July 2019)
41 slides from Asm International's investor day presentation, Jul 9, 2019
Slide 1: Enabling Advanced Wafer Processing with High Productivity Systems and New Materials
ENABLING ADVANCED WAFER PROCESSING WITH HIGH PRODUCTIVITY SYSTEMS AND NEW MATERIALS ASM International Analyst and Investor Technology Seminar Semicon West July 9, 2019
Slide 2: Cautionary Note
CAUTIONARY NOTE Cautionary Note Regarding Forward-Looking Statements: All matters discussed in this presentation, except for any historical data, are forward-looking statements. Forward-looking statements involve risks and uncertainties that could cause actual results to differ materially from those
Slide 3: Outline
OUTLINE › Device and Technology trends driving the ALD market • Logic • Memory • Patterning › ALD • ASM ALD Products • Selected applications in Logic, 3D-NAND, DRAM and Emerging Memory › PECVD › Vertical Furnace › Epitaxy • Epi process applications • Intrepid ES features and benefits › Epitaxy – Int
Slide 4: Outline
OUTLINE › Device and Technology trends driving the ALD market • Logic • Memory • Patterning › ALD • ASM ALD Products • Selected applications in Logic, 3D-NAND, DRAM and Emerging Memory › PECVD › Vertical Furnace › Epitaxy • Epi process applications • Intrepid ES features and benefits › Epitaxy – Int
Slide 5: Device and Technology Trends Driving ALD Market
DEVICE AND TECHNOLOGY TRENDS DRIVING ALD MARKET Logic Memory Patterning FinFET Gate All Around Gap fill for Self- EUV SE aligned Blocks Intel New metal for buried WL Emerging Memory Source: Imec, public https://semiengineeri ng.com/photoresist- New Selective shape-in-3d/ Conductors Deposition PCRAM
Slide 6: Outline
OUTLINE › Device and Technology trends driving the ALD market • Logic • Memory • Patterning › ALD • ASM ALD Products • Selected applications in Logic, DRAM, 3D-NAND and Emerging Memory › PECVD › Vertical Furnace › Epitaxy • Epi process applications • Intrepid ES features and benefits › Epitaxy – Int
Slide 7: ASM Products ALD (I)
ASM PRODUCTS ALD (I) EmerALD® Pulsar® Synergis® | 7
Slide 8: ASM Products ALD (II)
ASM PRODUCTS ALD (II) › Introduced Synergis® in 2018 › New dual chamber thermal ALD reactor technology evolved from decades of ALD expertise on Pulsar and EmerALD › Leverages industry proven XP8 platform architecture for high productivity solutions for logic and memory applications while maintaining
Slide 9: Synergis Combines Key ALD Technologies
SYNERGIS® COMBINES KEY ALD TECHNOLOGIES Synergis® Synergis® Single Wafer › Designed for optimal ALD performance: Clustering Process Flexibility High Productivity 1. Improve wafer thermal uniformity 2. Delivery of multiple low and high vapor pressure precursors for process flexibility 3. Manufacturab
Slide 10: Synergis Innovations for Flexibility and Performance
SYNERGIS® INNOVATIONS FOR FLEXIBILITY AND PERFORMANCE THERMAL UNIFORMITY FLEXIBLE PRECURSOR DELIVERY Pulse Pulse Pulse Ternary Source Purge Source Purge Gas Purge schemes A B C x y z 1.0%, 1s 0.2%, 1s Pulse Pulse Co-flow Source Purge Gas Purge schemes A +B C Improved WIWNU performance Ternary and co
Slide 11: Synergis Addresses the Expanding ALD Application Space
SYNERGIS® ADDRESSES THE EXPANDING ALD APPLICATION SPACE V1 ~1nm metal oxide DX MX M1 ESL V0 Metal oxide hard masks and etch stop layers with tunable etch Low temperature, low-k properties encapsulation and hermetic sealing layers W Barrier layer W ML NT Low resistivity, ultra-thin Low resistivity pu
Slide 12: Synergis ALD: Highest Performance at the Lowest Cost per Wafer
SYNERGIS® ALD: HIGHEST PERFORMANCE AT THE LOWEST COST PER WAFER › Synergis® thermal ALD provides best productivity without sacrificing film performance Significant reduction in capital costs and fab footprint › Flexible platform and architecture to meet needs of sub-7 nm technologies Ability to
Slide 13: ASM Products PEALD and PECVD
ASM PRODUCTS PEALD AND PECVD › XP8® -DCM / QCM High productivity single wafer tool for both PEALD and PECVD applications Accommodates up to 8 chambers for DCM, 16 chambers for QCM PEALD and PECVD can be integrated on the same platform DCM (Dual Chamber Module) QCM (Quad Chamber Module) | 13
Slide 14: Patterning Spacer Applications
PATTERNING SPACER APPLICATIONS Photo Source: TechInsights DRAM (1X) Logic (10~5nm) 3D-NAND Multiple patterning spacers Multiple patterning spacers 1patterning spacer examples examples Bit Line (SDDP) Active STI/Gate(SDQP) Fin/Gate Formation (SDQP) Emerging Memory Multiple patterning spacers examples
Slide 15: PEALD Processes for Logic Applications
PEALD PROCESSES FOR LOGIC APPLICATIONS PEALD application Photo Source: TechInsights Cut Mask Gap-fill SDB Gap-fill COAG SAC Gap-fill IO Transistor Gate Oxide Solid state doping Patterning HM COAG : Contact on Active Gate SDB : Single Diffusion Break SAC : Self Align Contact • Maintaining POR positio
Slide 16: PEALD Processes for 3D-NAND Applications
PEALD PROCESSES FOR 3D-NAND APPLICATIONS Photo Source: TechInsights PEALD application Raising Contact Landing Pad Slit Oxide Liner 92 stack 3D-NAND device • High aspect structure requires conformal film by using high coverage PEALD | 16
Slide 17: PEALD SiN for 3D-NAND Applications
PEALD SiN FOR 3D-NAND APPLICATIONS Raising Contact Landing Pad by PEALD SiN Samsung VLSI Symp 2009 Prevent contact etch punch-through SiN Raising contact landing Pad SiN W SiO SiO Contact Etch. Photo Source: TechInsights PEALD SiN • PEALD SiN SiN film on Top and Bottom only • Fewer etch steps and mo
Slide 18: PEALD Processes for EM Applications
PEALD PROCESSES FOR EM APPLICATIONS PEALD application GST inner liner GST Source:Micron OTS Source:TechInsights Source:Micron • As GST chalcogenide has low resistance to heat, PEALD / PECVD which enables low temperature film deposition is widely used. | 18
Slide 19: Outline
OUTLINE › Device and Technology trends driving the ALD market • Logic • Memory • Patterning › ALD • ASM ALD Products • Selected applications in Logic, 3D-NAND, DRAM and Emerging Memory › PECVD › Vertical Furnace › Epitaxy • Epi process applications • Intrepid ES features and benefits › Epitaxy – Int
Slide 20: PECVD Process Applications
PECVD PROCESS APPLICATIONS Photo Source: TechInsights Photo Source: TechInsights TEOS BEOL Low-k • High throughput • High throughput • Good wiw uniformity • Good wiw uniformity • High quality • High EM: direct CMP • Stress control • No need for glue layer • Stress control • Growing PECVD SAM in 3D-N
Slide 21: Outline
OUTLINE › Device and Technology trends driving the ALD market • Logic • Memory • Patterning › ALD • ASM ALD Products • Selected applications in Logic, 3D-NAND, DRAM and Emerging Memory › PECVD › Vertical Furnace › Epitaxy • Epi process applications • Intrepid ES features and benefits › Epitaxy – Int
Slide 22: ASM Products Furnace LPCVD/Diffusion/Batch ALD
ASM PRODUCTS FURNACE LPCVD /DIFFUSION /BATCH ALD › A412™ Dual boat/dual reactor system Clustering of applications between reactors possible – only vertical furnace in the market with this capability Up to 150 product wafer load size › A400™ for More than Moore Devices Dual boat/dual reactor
Slide 23: A400 / A412 Furnace - Innovation
A400™ / A412™ FURNACE - INNOVATION Example: LPCVD Silicon with Ultra long Preventive Maintenance Cycle › LPCVD Si process applications UNDOPED films DOPED (P,B) films › Growing Si Power device market › Driven by Automotive and Industrial Electronics › This technology enables low Total Cost of Ow
Slide 24: Outline
OUTLINE › Device and Technology trends driving the ALD market • Logic • Memory • Patterning › ALD • ASM ALD Products • Selected applications in Logic, 3D-NAND, DRAM and Emerging Memory › PECVD › Vertical Furnace › Epitaxy • Epi process applications • Intrepid ES features and benefits › Epitaxy – Int
Slide 25: Epi Critical Process Applications
EPI CRITICAL PROCESS APPLICATIONS 7nm 5nm 3nm 3/2nm Channel Undoped Si N Type Undoped Si Undoped Si Undoped Si LOGIC Undoped Si P Type Undoped Si 30% SiGe 30% SiGe Si/SiGe Nanosheets Liner/Cap LT Si LT Si 4% SiP Source Drain 4-8% SiP / SiAs 40% SiGe NSD 4-8% SiP 4-8% >50% SiP SiGe(B) >8% SiP / SiAs
Slide 26: Intrepid ES Key Design Features
INTREPID® ES KEY DESIGN FEATURES Intrepid® ES AEGIS/10-PORT Gas Injection Low Volume Chamber with Laminar Flow Superior uniformity with low CoO Real-time read back and active flow control Isothermal Chamber with Pyro Addition Low Mass Susceptor 1 Quartz temp Pyro for Isothermal Chamber control
Slide 27: Intrepid ES: Superior Dopant and Thickness Profile Tunability
INTREPID® ES: SUPERIOR DOPANT AND THICKNESS PROFILE TUNABILITY Low Volume Chamber with Laminar Flow Laminar Flow combines with AEGIS to generate various thickness and Ge% tunability AEGIS/10-PORT Gas Injection AEGIS Allows for Ge% Profile Tuning at the far wafer edge (1.2mm) | 27
Slide 28: Intrepid ES: Isothermal Chamber Advantage
INTREPID® ES: ISOTHERMAL CHAMBER ADVANTAGE PULSAR: CROSS-FLOW, HOT WALL REACTOR INTREPID ES: CROSS-FLOW, ISOTHERMAL REACTOR Gas Flow Application Quartz Temp, Quartz Temp, MWBC Clean Deposition Si Channel, DCS, 1500A 680 550 >30k Si Channel SiH4, 500A 650 300 >25k SiGe Channel, SiH4/GeH4, 500A 650 35
Slide 29: Intrepid ES: Isothermal Chamber Enables High Productivity
INTREPID® ES: ISOTHERMAL CHAMBER ENABLES HIGH PRODUCTIVITY DRAM SiGe Channel process 1.5x Normalized Throughput 1.1x 1x 50% Throughput increase from starting recipe compared to new optimized 25x multi-wafer clean recipe | 29
Slide 30: ASM Nanosheet Development: Interface Transition Thickness Minimization
ASM NANOSHEET DEVELOPMENT: INTERFACE TRANSITION THICKNESS MINIMIZATION Key Requirement: Transition width between the Si and SiGe layers needs to be minimized to <5A. This width directly influences the shape of the wire/sheet after etch. Intensity profile* Si Dd SiGe 90% 10% Si SiGe ~5A interface tra
Slide 31: ASM Epi Advantages
ASM EPI ADVANTAGES › Film tunability: low chamber volume with AEGIS = best in class thickness and dopant profile tuning › Isothermal hot wall chamber: long MWBC cycles, cleaner chamber for defectivity, and multi-wafer clean for high throughput › Significant push for reducing EPI costs for our custom
Slide 32: Outline
OUTLINE › Device and Technology trends driving the ALD market • Logic • Memory • Patterning › ALD • ASM ALD Products • Selected applications in Logic, 3D-NAND, DRAM and Emerging Memory › PECVD › Vertical Furnace › Epitaxy • Epi process applications • Intrepid ES features and benefits › Epitaxy – Int
Slide 33: Previum Integrated Pre-Clean Introduction
PREVIUM INTEGRATED PRE-CLEAN INTRODUCTION › What is Previum? • It is an integrated EPI preclean offering from ASM - It removes 15-20 monolayers of native oxide from the initial substrate before EPI deposition. › Why is Previum Needed? • Surface cleaning (removal of carbon and native oxide) is critic
Slide 34: Previum Pre-Clean in Logic Process Flow
PREVIUM® PRE-CLEAN IN LOGIC PROCESS FLOW SiN HM Si Channel SiGe Si Si Si nMOS pMOS Implant Si surface Previum + Channel Si Previum need based on thermal budget Previum + Channel SiGe (Selective) SiP SiN HM SiGeB Si SiGe Si SiGe SiGe Si STI Si STI Si STI Si Previum + SiGeB pMOS S/D (selective) Previu
Slide 35: Previum Pre-Clean Process Flow
PREVIUM® PRE-CLEAN PROCESS FLOW Previum Surface Cleaning Consists of 3 Process Recipe Steps for Carbon and Oxide Removal Carbon removal with Oxide conversion Salt sublimation H2 through RPU with wafer on cold susceptor with wafer held close to hot showerhead Ar/H2 Ar/H2 H2 NF3 NF3 RPU RPU RPU NH3 NH
Slide 36: Previum Performance: Effectiveness of Surface Cleaning Process
PREVIUM® PERFORMANCE: EFFECTIVENESS OF SURFACE CLEANING PROCESS • Primary purpose of the Previum process is to remove wafer surface contamination: Oxygen in the form of SiO2 (either native oxide or from previous processing steps) Carbon and Nitrogen (from atmospheric contamination and/or previou
Slide 37: Previum Performance: Oxide/Nitride Selectivity
PREVIUM® PERFORMANCE: OXIDE/NITRIDE SELECTIVITY › Device pattern wafers can have several different materials on the surface. The preclean process needs to remove oxide and carbon highly selective towards these materials. Typical metric compares removal of oxide compared to nitride with a target of
Slide 38: Previum Performance: Oxide Removal Uniformity
PREVIUM® PERFORMANCE: OXIDE REMOVAL UNIFORMITY Oxide removal uniformity across the wafer is extremely important to achieve consistent, uniform EPI growth and uniform device performance • Tight tolerance in within wafer removal uniformity is achieved through optimized chamber hardware: Etchant gas
Slide 39: Previum Performance: Process Repeatability
PREVIUM® PERFORMANCE: PROCESS REPEATABILITY Oxide Removal Particle Performance Monitor Wafer No. Adders Previum Marathon - 3000 wafers 258 0 512 0 Oxide Removal (A) 765 2 1018 0 1272 1 1526 2 Removal variation across 1779 3 3000 wafers is 1.5A 2033 0 2286 4 2539 4 2792 8 3046 1 Average Oxide Removal
Slide 40: Previum Integrated Pre-Clean Summary
PREVIUM® INTEGRATED PRE-CLEAN SUMMARY › Previum Integrated Surface Cleaning needed for high quality EPI film growth Carbon and Oxide removal in the same process recipe in the same process chamber › Enables multiple EPI steps in advanced Logic Devices › Process and hardware optimized to achieve req
Slide 41: Thank You
THANK YOU | 41