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Agilent Technologies — Technical Presentation (April 2012)

43 slides from Agilent Technologies's technical presentation, Apr 5, 2012

  1. Slide 1: Welcome

    Welcome Hsieh-Hung Hsieh (PhD) Technical Manager / RF Design Program TSMC George Estep RFIC Application Development Engineer Agilent EEsof Copyright © 2012 Agilent Technologies April 5, 2012

  2. Slide 2: Agenda

    Agenda • TSMC 60-GHz CMOS RDK • RDK Solution Approach • 60-GHz CMOS Design Opportunities and Applications • 60-GHz Reference Design • Comprehensive mm-Wave Simulation & Modeling Solutions • Top-down ESL architecture verification • RFIC circuit simulation & verification • EM analysis & verification •

  3. Slide 3: RDK Solution Approach

    RDK Solution Approach TSMC Property  A silicon-proven RF reference circuits and methodology packaged into a complete RF reference design kit (RDK):  Reference circuit design with correlated simulation and measurement data.  Methodology for simulation of substrate noise with substrate networks. 

  4. Slide 4: RF RDK Introduction

    RF RDK Introduction TSMC Property EM Comprehensive Flow • Compliant to TSMC dummy rules • Seamless simulation flow • Auto behavior model generation • Substrate Noise Analysis Ecosystem Partners Analyze substrate noise coupling in RF circuits • RF Behavior Model Scalable VCO Block Spec. Sizing, Cross

  5. Slide 5: 60-GHz CMOS Design Opportunities and Applications

    60-GHz CMOS Design TSMC Property Opportunities and Applications ECMA TC48 MAC, PHY and wireless Wireless Uncompressed HDMI HDTV Video 802.15.3c Wireless PC interface IEEE 802.11.ac/ad Mobile device WirelessHD HDMI 802.11 serial Target on wireless Below 6G & 60G HDMI 5 © 2012 TSMC, Ltd

  6. Slide 6: Motivation of 60-GHz Design

    Motivation of 60-GHz Design TSMC Property  60-GHz band:  High atmospheric attenuation  Higher throughput:  Never ending demand of high data rate  Support more and more users or applications  7 GHz of unlicensed spectrum (57-64 GHz)  Flexible use of spectrum resource  Communication in a wide

  7. Slide 7: Applications of 60-GHz RFIC

    Applications of 60-GHz RFIC TSMC Property  Applications of 60-GHz RFIC: “Emerging technology”, WiGig Alliance Newest Office 7 © 2012 TSMC, Ltd

  8. Slide 8: RDK 60G 65nm Design Package

    RDK 60G 65nm Design Package TSMC Property  60-GHz wireless design:  Setup millimeter wave very high throughput design flow  Achieve reliable measurement results  Enable RF top-down design methodology to perform system level simulation with behavior model solution  Extra devices/ transmission li

  9. Slide 9: TSMC 60-GHz RF Frontend Architecture

    TSMC 60-GHz RF Frontend Architecture TSMC Property  Based on a heterodyne architecture (two-step conversion).  Frequency planning: 60-GHz RF, 48GHz LO1, 12-GHz IF.  RDK circuit scope: LNA, PA, and VCO. LNA IFA LO1 LO2_I VCO /4 LO2_Q PA IFA 9 © 2012 TSMC, Ltd

  10. Slide 10: 60-GHz Microstrip-Line-Based LNA

    60-GHz Microstrip-Line-Based LNA TSMC Property  The proposed 60-GHz LNA is composed of three gain stages.  The transmission lines are realized in microstrip lines. VDD1 VDD2 VDD3 Microstrip Line M2 M4 M6 RFin M1 M3 M5 RFout VB1 VB2 VB3 10 © 2012 TSMC, Ltd

  11. Slide 11: 60-GHz Microstrip-Line-Based LNA

    60-GHz Microstrip-Line-Based LNA TSMC Property  Operate at a supply voltage of 1.0 V. 30 30 20 20 10 10 S11 (dB) S21 (dB) 0 0 -10 -10 -20 -20 -30 -30 40 45 50 55 60 65 70 75 80 40 45 50 55 60 65 70 75 80 Frequency (GHz) Frequency (GHz) 30 10 20 8 10 S22 (dB) 6 NF (dB) 0 4 -10 -20 2 Simulation Measu

  12. Slide 12: 60-GHz Microstrip-Line-Based LNA

    60-GHz Microstrip-Line-Based LNA TSMC Property  With 5T model, more accurate silicon correlation can be achieved. 30 30 20 20 Mag (S21) (dB) 10 10 S21 (dB) 0 0 -10 -10 Simulation -20 -20 Measurement -30 -30 40 45 50 55 60 65 70 75 80 40 45 50 55 60 65 70 75 80 Frequency (GHz) Frequency (GHz) 4T mod

  13. Slide 13: 60-GHz Microstrip-Line-Based LNA

    60-GHz Microstrip-Line-Based LNA TSMC Property  Impact of different metal scheme:  Difference of gain between 1P9M and 1P6M at 60 GHz is 3 dB.  Difference of NF between 1P9M and 1P6M at 60 GHz is 0.4 dB.  More metal stack is beneficial to circuit performance. 30 20 Mag (S21) (dB) 10 0 -10 1P6M -

  14. Slide 14: 60-GHz Slow-Wave-TL-Based LNA

    60-GHz Slow-Wave-TL-Based LNA TSMC Property  Slow-wave-TL-based LNA:  With the use of slow-wave TL, the compact chip area can be obtained.  Due to the decrease of insertion loss, for a targeted gain, the required dc power can be reduced while noise performance becomes better. Similar Layout Style

  15. Slide 15: 60-GHz ESD Reference Design

    60-GHz ESD Reference Design TSMC Property  4kV ESD capability is achieved by using combination of short-circuited and open- circuited stubs.  Difference of gain between LNA w/i and w/o ESD at 60 GHz is 0.2 dB.  Difference of NF between LNA w/i and w/o ESD at 60 GHz is 0.5 dB. 15 © 2012 TSMC, Ltd

  16. Slide 16: 60-GHz Transformer-Based PA

    60-GHz Transformer-Based PA TSMC Property  Based on a three-stage differential transformer-coupled architecture.  To stabilize the circuit, the gate resistors are employed in three gain stages. M1 M3 M4 Microstrip Line VDD M2 RFin RFout VDD VDD VDD VG2 VG3 VG1 VDD M2 M1 M3 M4 16 © 2012 TSMC, Ltd

  17. Slide 17: 60-GHz Transformer-Based PA

    60-GHz Transformer-Based PA TSMC Property  The frequency response of each stage is provided in the following figure.  With the increase of coupling capacitor Cc, the cross-coupled pair is formed in the pseudo-differential common-source stage, leading to possible oscillation. 0 200 Cc = 0 fF 150 Cc

  18. Slide 18: 60-GHz Transformer-Based PA

    60-GHz Transformer-Based PA TSMC Property  Operate at a supply voltage of 1.0 V. 30 20 20 Output Power (dBm) 10 10 S21 (dB) 0 0 -10 -10 -20 -30 -20 40 45 50 55 60 65 70 75 80 -20 -15 -10 -5 0 5 Frequency (GHz) Input Power (dBm) Meas Sim 18 © 2012 TSMC, Ltd

  19. Slide 19: PVT EM Corner Simulation

    PVT EM Corner Simulation TSMC Property  The frequency shift is observed (~ 1 GHz) with the EM corner simulation.  The simulation results indicate that the wideband operation of 60-GHz circuit is essential. 19 © 2012 TSMC, Ltd

  20. Slide 20: 48-GHz Wideband VCO

    48-GHz Wideband VCO TSMC Property  The proposed 48-GHz VCO adopts a thermometer-weighted switched-capacitor array for wideband operations. VDD VB_VCO VTUNE +VO -VO Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7 M1 M2 B0 0 1V 1V 1V 1V 1V 1V 1V B0 B1 0 0 1V 1V 1V 1V 1V 1V B1 B2 0 0 0 1V 1V 1

  21. Slide 21: 48-GHz Wideband VCO

    48-GHz Wideband VCO TSMC Property  Operate at a supply voltage of 1.0 V. 56 56 54 54 Osc. Frequency (GHz) Osc. Frequency (GHz) 52 52 50 50 48 48 46 46 44 44 0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.2 0.4 0.6 0.8 1.0 Controlled Voltage (V) Controlled Voltage (V) Meas Sim 21 © 2012 TSMC, Ltd

  22. Slide 22: Summary on 60-GHz Reference Design

    Summary on 60-GHz Reference Design TSMC Property  Critical building blocks of 60-GHz RFIC: LNA, PA, and VCO.  Utilize new devices: transmission line for LNA.  Include circuit database, model, and complete design flow.  Circuit-level silicon validation with millimeter-wave models. 22 © 2012 TSMC,

  23. Slide 23: Agilent EEsof within the 60-GHz RDK

    Agilent EEsof within the 60-GHz RDK R1 R1 R1 M1 M3 M4 Focus of 60-GHz RDK summary: RFin VDD T1 M2 RFout VDD VDD VDD VG2 VG3 VG1 • Combination of fundamental circuit blocks, design flows, VDD R1 T1 M2 M1 R1 M3 R1 M4 CORE LP1 VDD Vctrl Cvar Cvar Ibias1 LP1 BUF LP2 vout VDD LP2 documentation and models

  24. Slide 24: Agilent EEsof 60-GHz RDK contributions

    Agilent EEsof 60-GHz RDK contributions Inputs from System-level Schematic Entry Circuit Simulation Layout DRC/LVS Parasitic Extraction GDSII or SOC integration 24

  25. Slide 25: Agilent EEsof 60-GHz RDK contributions

    Agilent EEsof 60-GHz RDK contributions SystemVue Verification Inputs from System-level Component Options Broadband SPICE GoldenGate FCE Schematic Entry Model Generator S-parameter Momentum Simulator RF-ESL Analysis & Circuit Simulation Inductor & Passive Design support  GoldenGate Component Design

  26. Slide 26: Agilent EEsof 60-GHz RDK contributions

    Agilent EEsof 60-GHz RDK contributions • Top-down ESL architecture verification • Verify at every level vs. consistent 802.11ad TX/RX references • RFIC circuit simulation & verification • Full characterization of complete RF transceiver prior to tape-out • EM analysis & verification • Enable EM anal

  27. Slide 27: Agilent EEsof 60-GHz RDK contributions

    Agilent EEsof 60-GHz RDK contributions • Top-down ESL architecture verification • Verify at every level vs. consistent 802.11ad TX/RX references • RFIC circuit simulation & verification • Full characterization of complete RF transceiver prior to tape-out • EM analysis & verification • Enable EM anal

  28. Slide 28: Top-down ESL architecture verification

    Top-down ESL architecture verification Verify at every level vs. consistent 802.11ad TX/RX baseband references 1 3 Initial downconverter Download to T&M system architecture (use the same test vectors (RF chain used directly in system- for hardware verification, level performance study) - 12-Gsa/sec

  29. Slide 29: Initial 60GHz Transceiver Architecture

    Initial 60GHz Transceiver Architecture 1 • Initial architecture selection and block spec refinement with SpectraSys • Architecture and block spec validation vs. consistent 802.11ad TX/RX baseband references in SystemVue 29

  30. Slide 30: 0- to 200-GHz Spectrums & Noise at RX nodes

    0- to 200-GHz Spectrums & Noise at RX nodes 30

  31. Slide 31: 802.11ad PHY simulated results

    802.11ad PHY simulated results with RFIC CMOS PA, multipath fading, noise: EVM=2.5% 2 31

  32. Slide 32: Agilent EEsof 60-GHz RDK contributions

    Agilent EEsof 60-GHz RDK contributions • Top-down ESL architecture verification • Verify at every level vs. consistent 802.11ad TX/RX references • RFIC circuit simulation & verification • Full characterization of complete RF transceiver prior to tape-out • EM analysis & verification • Enable EM anal

  33. Slide 33: TSMC 60-GHz CMOS mm-Wave RDK Circuit Example: Transformer coupled Power Amp

    TSMC 60-GHz CMOS mm-Wave RDK Circuit Example: Transformer coupled Power Amp Schematic Layout R1 R1 R1 M1 M3 M4 T1 M2 VDD RFin RFout VDD VDD VDD VG2 VG3 VG1 T1 VDD M2 R1 R1 R1 M1 M3 M4 Circuit simulation: EM simulation: DC, S-Parameters, Pout vs Pin, IP3, Noise • Component level: Input/output GSG Fig

  34. Slide 34: GoldenGate overview and 60-GHz RDK usage

    GoldenGate overview and 60-GHz RDK usage Best-in-class RF circuit simulator: R1 R1 R1 M1 M3 M4 • Full characterization of complete RF transceivers prior to tape-out RFin VDD T1 M2 RFout VDD VDD VDD • Supports all large and small signal RF and transient analyses including large VG2 VG3 VG1 CORE VDD B

  35. Slide 35: Power Amp characterization in GoldenGate

    TSMC 60-GHz CMOS mm-Wave RDK Power Amp characterization in GoldenGate R1 R1 R1 M1 M3 M4 T1 M2 VDD RFin RFout VDD VDD VDD VG2 VG3 VG1 T1 VDD M2 R1 R1 R1 M1 M3 M4 Full characterization of performance metrics: NF, Pout vs Pin, IP3, Load Pull, PAE, ACPR, … 30 20 Mag (S21) (dB) 10 0 -10 Simulation -20 Me

  36. Slide 36: Agilent EEsof 60-GHz RDK contributions

    Agilent EEsof 60-GHz RDK contributions • Top-down ESL architecture verification • Verify at every level vs. consistent 802.11ad TX/RX references • RFIC circuit simulation & verification • Full characterization of complete RF transceiver prior to tape-out • EM analysis & verification • Enable EM anal

  37. Slide 37: Momentum in the 60-GHz RDK

    Momentum in the 60-GHz RDK Most popular 3D planar electromagnetic simulator: R1 R1 R1 M1 M3 M4 • Advanced NlogN and multi-threading solver algorithms for optimal speed, RFin VDD T1 M2 RFout VDD VDD VDD accuracy and capacity VG2 VG3 VG1 CORE VDD BUF VDD T1 Ibias1 VDD M2 LP2 LP2 Vctrl R1 R1 R1 LP1 LP1

  38. Slide 38: Momentum support in TSMC PDKs

    Momentum support in TSMC PDKs Momentum officially qualified for TSMC’s 90-, 65- and 40-nm processes: • Momentum has passed TSMC extensive qualification tests against measurements up to 30 GHz for different configurations • +20 inductors on average validated with different metal stacks for symmetric,

  39. Slide 39: Momentum Qualification up to 110 GHz

    Momentum Qualification up to 110 GHz Passive building blocks (Transformers, Transmission lines) Momentum Measurement S11 dB(S21) Cs Rs S22 phase(S21) Cg1+Cg2 Rg1//Rg2 39

  40. Slide 40: Agilent EEsof 60-GHz RDK contributions

    Agilent EEsof 60-GHz RDK contributions • Top-down ESL architecture verification • Verify at every level vs. consistent 802.11ad TX/RX references • RFIC circuit simulation & verification • Full characterization of complete RF transceiver prior to tape-out • EM analysis & verification • Enable EM anal

  41. Slide 41: ADS – QFN Designer

    ADS – QFN Designer Predict Packaged Performance in Minutes Configure QFN package Accurately predict real performance Quickly synthesize complex package, combine with IC & PCB data Performance w/ & w/o package 41

  42. Slide 42: Summary

    Summary • 60-GHz RDK Introduction • A silicon-proven MS/RF reference circuit and methodology packaged into a complete RF reference design kit (RDK) • Provides RF top-down design and bottom-up verification methodologies from system-level simulation through tape-out • Enables design collaboration with

  43. Slide 43: You are Invited:

    You are Invited: Dingqing LuTechnical Sr. Application Specialist, Agilent EEsof EDA Daren McClearnon – ESL Product Planning Manager Agilent EEsof EDA You can find more webcasts www.agilent.com/find/eesof-innovations-in-eda www.agilent.com/find/eesof-webcasts-recorded Copyright © 2012 Agilent Technol

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