Synopsys, Inc. · NASDAQ:SNPS
Synopsys — Investor Presentation (June 2015)
52 slides from Synopsys's investor presentation, June 2015
Slide 1: Corporate Overview for Investors
Corporate Overview for Investors June 2015 May 2015
Slide 2: Forward-Looking Statements
Forward-Looking Statements This presentation contains forward-looking statements under the safe harbor provisions of Section 21E of the Securities Exchange Act of 1934, including statements regarding projected financial results and long-term growth rates. For a discussion of important factors that c
Slide 3: Synopsys Introduction
Synopsys Introduction • Global leader in Electronic Design Automation (EDA), the tools and technologies used to design chips • Leading provider of semiconductor Intellectual Property (IP), the reusable building blocks that are used for chip designs • The market & technology leader: Virtually all lea
Slide 4: Strategic Priorities – Next Several Years
Strategic Priorities – Next Several Years • Maintain our clear technical, business and support leadership in core EDA • Drive continued growth in IP and Systems • Expand our presence in the software quality, test and security space © 2015 Synopsys, Inc. 4
Slide 5: Synopsys: The Market & Technology Leader
Synopsys: The Market & Technology Leader FY14 FY15 (Target*) Revenue: $2.057B $2.210 – $2.235B (7-9%) NG EPS: $2.53 $2.76 – $2.81 (9-11%) Business Model: ~90% time-based Revenue Sources: ~½ International Employees: ~9,450 Market Cap: ~$7.8B Founded: 1986 Patents Granted: 2,404 * These targets were p
Slide 6: Uniquely Positioned for Stability and Growth
Synopsys: The Market & Technology Leader Uniquely Positioned for Stability and Growth • Dynamic markets • Clear technology leadership • Financial strength and growth © 2015 Synopsys, Inc. 6
Slide 7: Global Value Chain
Global Value Chain EDA & IP – At the Heart of Accelerating Electronics Innovation EDA & IP* $9.0B Embedded Software* $4.3B Foundry $42.1B Semiconductors $353B Electronic Systems $1,488B *Estimates are provided for EDA/IP/Embedded Software. Source: IC Insights, VDC Research, Synopsys Estimates © 2015
Slide 8: Helping Design the Chips Inside
Helping Design the Chips Inside Impacting Everyone, Everything, Everywhere, Every Day Mobile Computing & Peripherals Medical Data Center & Networking Automotive Military / Aerospace Cloud Infrastructure Digital Home Internet of Things Industrial © 2015 Synopsys, Inc. 8
Slide 9: Mobile
Mobile Global Internet Device Sales 3,000,000,000 2,500,000,000 2,000,000,000 We Are Here 1,500,000,000 1,000,000,000 Smartphones 500,000,000 Personal Computers 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013E 2014E 2015E 2016E Personal Computers Smartphones Tablets Source: Bus
Slide 10: Data, Data, Data – Cloud Infrastructure
Data, Data, Data – Cloud Infrastructure Smartphone PC Tablet Data Access Smart TV By 2017, the annual global IP traffic will surpass the zettabyte threshold (1.4 zettabytes). Source: Cisco Systems, VNI Global Mobile Data Traffic Forecast Update 2013 © 2015 Synopsys, Inc. 10
Slide 11: Internet of Things
Internet of Things Power Buildings Cars Toasters Lamps…? SW & E/E Software Lines of % Vehicle Code Cost Sensors Example 1970 100K <9% “Smart” Microprocessors Storage 1990 1M 33% Communication 2010 100M >40% © 2015 Synopsys, Inc. 11
Slide 12: Significant Growth in Sensors
Sensors Are Everywhere Significant Growth in Sensors Sensor Units to Grow to 30 Billion Units in 2017 Consumer 30B Units 30000 Automotive Computing 25000 Smartphones Feature Phones 20000 Industrial Other Communications 15000 10B Units 10000 5000 0 2009 2010 2011 2012 2013 2014 2015 2016 2017 Source:
Slide 13: Semiconductor Design Complexity
Semiconductor Design Complexity • An advanced design today will take 18-24 months to complete, and can cost up to $200M • Complexity of designs has increased exponentially, requiring more, and more advanced, EDA tools • As IC design complexity grows, there is the need to embed an increasing amount o
Slide 14: Complexity Drives Demand for Tools
Complexity Drives Demand for Tools Synopsys Consistently Leads in Advanced Designs Leader at Leader at Leader at Leader at 32/28nm 22/20nm 14/16nm 10nm • Leading companies migrating to very advanced nodes; some waiting at 32/28nm • Many choosing to skip 22/20nm and go to 16/14nm FinFET • Ramp of 16/
Slide 15: Leading the Way in FinFET
Leading the Way in FinFET 250 FinFET 200 22 16 14 10 150 Tracking nearly 100 220 FinFET designs and tape- 50 outs worldwide 0 Q4'09 Q3'12 Q2'09 Q3'09 Q1'10 Q2'10 Q3'10 Q4'10 Q1'11 Q2'11 Q3'11 Q4'11 Q1'12 Q2'12 Q4'12 Q1'13 Q2'13 Q3'13 Q4'13 Q1'14 Q2'14 Q3'14 Q4'14 Q1'15 Q2'15 Synopsys is integral to
Slide 16: Comprehensive FinFET Solution
Comprehensive FinFET Solution Synopsys’ FinFET “Clearly, from a technical point of view, Moore’s Law is alive and Leadership well, and Synopsys is central in driving it forward,” Aart de Geus, Synopsys Chairman and Co-CEO • Have invested in the extremely fast-growing FinFET segment for almost a deca
Slide 17: Designs Are Becoming More Costly
Designs Are Becoming More Costly Primary Designs $600 Note: Primary Designs are new and more-complex design(s), typically $500 shipping in high-volumes, are developed on the next process node, require Software qualification on a whole new range of IP, and typically contain extensive software content
Slide 18: Blue Chip Customer Base
Blue Chip Customer Base • Customer base consists of virtually all semiconductor companies in the world, including all of the top 20 • One >10% customer (Q215) • For many years we have collaborated closely with market leaders, including top foundries, IDMs and fabless customers © 2015 Synopsys, Inc.
Slide 19: Uniquely Positioned for Stability and Growth
Synopsys: The Market & Technology Leader Uniquely Positioned for Stability and Growth • Dynamic markets • Clear technology leadership • Financial strength and growth © 2015 Synopsys, Inc. 19
Slide 20: Broadest Portfolio of Best-in-Class Technology
Broadest Portfolio of Best-in-Class Technology © 2015 Synopsys, Inc. 20
Slide 21: #1 in Core EDA
#1 in Core EDA • 61% of current revenue; 4.2% trailing twelve- month revenue growth* System Design • ~95% of FinFET designs and tape-outs have relied on Synopsys Verification IP Implementation • Vast majority of advanced designs utilize Synopsys digital verification • 19 of the top 20 semiconductor
Slide 22: IC Compiler II
IC Compiler II Game-Changer in Place & Route Rebuild Rethink Reuse New Infrastructure New Engines Best of IC Compiler I Data Model Multi Multi Hier Mode Timer Floor Plan Linear Placer Multi Multi Thread Voltage Multi Opt. Clock Tree Zroute View Enabling 10X Throughput © 2015 Synopsys, Inc. 22
Slide 23: Industry's #1 Verification
Verification Industry’s #1 Continuum • Game-changing Planning & Coverage new platform launched in 2014 Debug #1 • Seamless integration • Built around best- #1 #1 #1 in-class engines; Virtual Static & FPGA adding unified Simulation Emulation Prototype Formal Prototype debug, compile • Goal: speed sof
Slide 24: 2014: Verification Compiler
2014: Verification Compiler Comprehensive, Best-in-Class Verification in One Product © 2015 Synopsys, Inc. 24
Slide 25: Verification Compiler
Verification Compiler Next Gen Native Complete Technology Integrations Access Compilers GUIs Low Power Formal Unified Dbases APIs CDC Adv. Lint Flows Enable “3X” Verification Productivity © 2015 Synopsys, Inc. 25
Slide 26: ZeBu Server-3
ZeBu Server-3 Industry’s Fastest Emulation System Debug Comprehensive debug Performance with full signal visibility Speeds HW/SW bring-up and Verdi3 integration and SoC verification up to 4X for faster time-to-market \ Architecture Advanced architecture for Hybrid Emulation lower total cost of owner
Slide 27: #1 in Manufacturing
#1 in Manufacturing • 8% of current revenue; -1% trailing twelve- month revenue growth* System Design • Mask data prep tools used by 8 of the top 10 semiconductor manufacturers Verification IP Implementation • TCAD tools used by 9 of the top 10 semiconductor manufacturers • Yield management solution
Slide 28: Growth in Core EDA + Manufacturing
Growth in Core EDA + Manufacturing Estimated Long-Term Organic Growth Rate • Generally in the low-to-mid single digit range* • Growth drivers: ‒Segment growth + market share gains Segment Growth Drivers • Semi R&D growth • Demand for new designs, new devices • Increasing complexity requiring new, ad
Slide 29: Growth in IP/Systems/Software Integrity
Growth in IP/Systems/Software Integrity • 28% of current revenue; 26% trailing twelve- month revenue growth* System Design • Estimated long-term organic revenue growth: generally in the low double-digits** Verification IP Implementation • Top-20 semiconductor vendors continue to outsource more IP to
Slide 30: #2 IP Vendor
#2 IP Vendor Leader in Interface, Analog & Memory IP Leadership Enables Investment in Quality, Support, Features and Processes Design IP Revenue, Worldwide (in Millions)* Design IP Revenue, Wired Interface Design IP Revenue, Wired Interface 2014 2013 Rank Company Rank Company 20142013 ShareShare 1 1
Slide 31: Third-Party IP – Synopsys Differentiator
Third-Party IP – Synopsys Differentiator Specialty I/O Application Application Graphic CPU CPU RAM RAM ROM Core(s) LVDS, Etc Established Provider 15+ years of investment and Flash Flash Storage execution RAM RAM RAM RAM Interface Resource On-Chip Bus DDR DDR memory Commitment Interface (UARTs/Timers
Slide 32: 3rd Party IP Usage Will Continue to Double Through 2018
3rd Party IP Usage Will Continue to Double Through 2018 Wireless communication 2018 2013 Increasing Design Consume Complexity Escalating Design Costs Data processing Shorter Time Window for Automotive New Product Launch Overall 3rd party design Wired communication IP use in 2013 Overall 3rd party de
Slide 33: IP Market Growing to $4.3B by 2018
IP Market Growing to $4.3B by 2018 $5,000 25.0% $4,500 $4,315 20.0% $4,000 $3,836 $3,441 15.0% $3,500 $3,119 $3,000 $2,784 Growth Revenue 10.0% $2,457 $2,500 $2,203 $1,913 5.0% $2,000 $1,624 $1,500 $1,343 0.0% $1,000 -5.0% $500 $- -10.0% 2009 2010 2011 2012 2013 2014E 2015E 2016E 2017E 2018E IP Reve
Slide 34: IP Business Models
IP Business Models Single Use Multi-Use Agreement Engineering Service • Customer buys IP for • Customer buys a pool • Customer pays for a specific project of IP that can be used porting IP to specific over a multi-year semiconductor • Revenue recognized period until the pool is process or up front e
Slide 35: IP Accelerated Initiative
IP Accelerated Initiative Fast Prototyping, Software Development & Integration Redefining the IP Supplier Paradigm IP Accelerated IP Accelerated augments broad, Broad IP silicon-proven DesignWare IP Portfolio portfolio with: DesignWare IP Development Kits • IP prototyping kits with reference designs
Slide 36: System-Level Design
System-Level Design • #1 provider of system design solutions HW/SW Transactions including tools, models and services for: ‒ Accelerating software development ‒ Hardware/Software integration Register Transfer ‒ System validation • Immense chip/system complexity requires new approaches to HW/SW and sy
Slide 37: Synopsys Expands TAM w/ Coverity
Synopsys Expands TAM w/ Coverity • Acquired Coverity for $375M ($334M net of cash acquired) Synopsys Enters Software Quality and Security Market with Coverity Acquisition • Leading provider of Software Coverity Improves Code Quality and Security, Resulting in Better Quality, Testing and Security Sof
Slide 38: Current Synopsys Customers Plus Brand New Customer Base
Current Synopsys Customers Plus Brand New Customer Base Current Semis/Systems Customers New Verticals, Customers Banking, Financial Services, Energy, Different Users, Different Budgets Aerospace/Defense, Software, Internet, Industrial, etc. Naturally adjacent Core competencies: • Algorithm-based tec
Slide 39: Acquisitions to Expand Security Offering
Acquisitions to Expand Security Offering • Announced intent to acquire Codenomicon (April 20) Synopsys Enters Software Quality and Security Market with Coverity Acquisition • Independent discoverer of Coverity Improves Code Quality and Security, Resulting in Better Heartbleed bug; security testing S
Slide 40: Software Test Markets and Strategies
Software Test Markets and Strategies 1 Core Market Enter Dynamic a) Leverage Synopsys in Embedded Unique technology to test Codenomicon b) Build on Success in New Markets only changed code Quotium Dynamic c) Extend Differentiation 3 $1250M $560M 2 Grow in Security a) Extend Brand b) Add more Checker
Slide 41: Uniquely Positioned for Stability and Growth
Synopsys: The Market & Technology Leader Uniquely Positioned for Stability and Growth • Dynamic markets • Clear technology leadership • Financial strength and growth © 2015 Synopsys, Inc. 41
Slide 42: Growth and Predictability
Growth and Predictability Revenue ($M) $2,500 $2,057 $2,223 • Predictable, time-based $1,962 $2,000 $1,536 $1,756 revenue model $1,500 • Entered FY15 with ~80% of $1,000 $500 revenue in hand; enter each $0 quarter with ~90% in hand FY11 FY12 FY13 FY14 FY15 Guide-Mid* • Non-cancellable backlog: 12% 5
Slide 43: Predictable Time-Based Revenue
Predictable Time-Based Revenue 3-Year Backlog • Significant Non-cancellable $3,500 $3.5B 3-year Backlog $3,000 $2,500 $3.1B – $3.5B at end of FY14 $2.7B $2,000 – More backlog than next 2 largest $1,500 EDA players combined $1,000 $500 • Predictable, time-based $0 FY12 FY13 FY14 revenue model – In Q4
Slide 44: Strong Operating Cash Flow
Strong Operating Cash Flow Annual Operating Cash Flow • Roughly tracks EBITDA less $600 $551 cash taxes over time $486 $497 $500 $450 • OCF is lumpy $400 ‒ Difficult to forecast period to period $ Millions $300 ‒ Timing of large contracts $200 ‒ Disbursements (affected by M&A) $100 • Goal is to opti
Slide 45: Efficient Resource Management
Efficient Resource Management 100% 90% 20% 23% • Most profitable ($) in EDA 80% 7% 70% 6% • Have reduced G&A and S&M spending (as % of revenue) 60% 27% 21% 50% • Expect to maintain NG R&D 40% spend at ~30% of revenue 33% 30% 29% • Goal is to focus on global 20% operational efficiency to 10% 17% 17%
Slide 46: Technologically & Geographically Diversified
Technologically & Geographically Diversified 3% 3% 3% 100% 100% 90% 10% 9% 9% 90% 21% 23% 25% 80% 80% 25% 25% 26% 70% 70% 17% 14% 12% $ Millions $ Millions 60% 60% 13% 14% 13% 50% 50% 40% 40% 30% 62% 63% 62% 30% 49% 50% 51% 20% 20% 10% 10% 0% 0% FY12 FY13 FY14 FY12 FY13 FY14 Core EDA IP/Systems/SW I
Slide 47: Capital Allocation Strategy
Capital Allocation Strategy Disciplined resource management and allocation Actively explore TAM-expanding R&D and M&A opportunities Optimize the use of our strong cash flow, through a balance of M&A, debt reduction and stock buybacks © 2015 Synopsys, Inc. 47
Slide 48: Solid Balance Sheet
Solid Balance Sheet US Non US • $785M net cash at end of $1,004 $1,022 $986 $1,005 Q215 $1,000 • Split of U.S. vs. non-U.S. $800 cash can influence $700 investment decisions $ Millions $600 • Buybacks and debt repayments funded entirely $400 with U.S. cash $200 • Typically like to hold a minimum of
Slide 49: Returning Cash to Shareholders
Returning Cash to Shareholders Annual Share Buybacks • Since 2010, spent $1.1B on $500 $435 buybacks $400 o $180M in 1H 2015 $ Millions $300 • $200M remaining on our $200 $185 $180 current share repurchase $145 $120 authorization* $100 $40 • Goal is to optimize the use of $0 our strong cash flow, th
Slide 50: Long-term Operating Model
Long-term Operating Model* Primary long-term objective is to drive high-single- digit EPS growth through a mix of the following elements: • Organically grow traditional EDA revenue generally in the low-to-mid single digit range • Organically grow IP/Systems/SW Integrity revenue generally in the low
Slide 51: Summary
Summary • Dynamic markets – World’s leading EDA supplier and #2 IP vendor • Clear technology leadership – Broadest portfolio of best-in-class technology with multi-year upgrade cycle • Financial strength and growth – Excellent financial position and execution © 2015 Synopsys, Inc. 51
Slide 52: Thank You
Synopsys n to Software” Thank You