Analog Devices, Inc. · NASDAQ:ADI
Analog Devices — Technical Presentation
43 slides from Analog Devices's technical presentation
Slide 1: Blackfin Optimizations for Performance and Power Consumption
The World Leader in High Performance Signal Processing Solutions Blackfin® Optimizations for Performance and Power Consumption Presented by: Merril Weiner Senior DSP Engineer
Slide 2: About This Module
About This Module This module describes the different ways to optimize the software design to increase performance on the Blackfin processor and/or reduce power consumption for low power applications. • Example implementations for audio players and video players will be used to explain the concepts
Slide 3: Module Outline
Module Outline 1. Overview 2. Optimizing Internal Memory Use 3. Optimizing External Memory Use 4. Power Modes 5. Demos 3 Blackfin Optimizations for Performance and Power Consumption
Slide 4: Overview
Overview 4 Blackfin Optimizations for Performance and Power Consumption
Slide 5: Strategies
Strategies Optimized Software Design = Increased Performance = More Features or Lower Power Consumption • Optimized software design means lower MIPS required, allowing for additional features to be added or to reduce the frequency (less dynamic power) and voltage (less static power). • Optimized cod
Slide 6: More Features or Lower Power
More Features or Lower Power Blackfin BF531 400 MHz Power 160.0 140.0 120.0 100.0 Power (mW) 80.0 Core Voltage (V) 60.0 0.8 40.0 0.85 0.95 20.0 1.045 1.14 0.0 0 50 100 150 200 250 300 350 400 MIPS Blackfin BF531 Data Sheet Rev. D and Application Note EE-229 Note: Full on, typical at 25C 6 Blackfin O
Slide 7: Software Example—Portable Media Player
Software Example—Portable Media Player Example implementation for the Blackfin family of a low power portable media player • Audio-only playback example • Blackfin BF531 • Audio/video playback example • Blackfin BF533 • These techniques are applicable across all Blackfin processors 7 Blackfin Optimi
Slide 8: Optimizing Internal Memory Use
Optimizing Internal Memory Use 8 Blackfin Optimizations for Performance and Power Consumption
Slide 9: L1 Instruction SRAM vs. I-Cache
L1 Instruction SRAM vs. I-Cache When algorithms exceed the BF531 16 kB of L1 I-cache, using I-cache 16 kB may not be sufficient for optimal Cache or 16 kB SRAM SRAM performance. In these cases, use L1 instruction SRAM for overlays. L1 Instruction 32 kB • Audio decoders < 16 kB instruction BF533 • Vi
Slide 10: L1 Instruction SRAM vs. I-Cache (cont.)
L1 Instruction SRAM vs. I-Cache (cont.) Using L1 instruction SRAM vs. L1 I-cache BF531 • Cache-only model 16 kB 16 kB Cache or • Only use L1 instruction for I-cache. SRAM SRAM • Pros • Perfect for audio-only applications or where L1 Instruction 32 kB all critical modules have < 16 kB code. • Works w
Slide 11: L1 Instruction SRAM vs. I-Cache (cont.)
L1 Instruction SRAM vs. I-Cache (cont.) • Overlay model BF533 • Only use L1 instruction for code overlay. • Multiple overlays or single overlay. OS, Drivers, Code Overlays • Pros etc. • Increased performance for code placed in L1 instruction SRAM as code execution may be delayed if it is not current
Slide 12: L1 Instruction SRAM vs. I-Cache (cont.)
L1 Instruction SRAM vs. I-Cache (cont.) • Hybrid model BF533 • Use L1 instruction SRAM and I-cache. 16 kB OS, • Place as much critical code as Cache etc. Code Overlays possible in L1 instruction SRAM overlays. • Pros • Excellent performance for critical modules L1 Instruction 80 kB placed in L1 inst
Slide 13: L1 Instruction SRAM vs. I-Cache (cont.)
L1 Instruction SRAM vs. I-Cache (cont.) • Video example BF533 • Use hybrid model, the best of both worlds. 8 kB 16 kB • Memory map Cache OS, 56 kB Code Overlays etc. • Turn on I-cache (16 kB of L1). • Set aside L1 instruction SRAM for OS and drivers (8 kB). L1 Instruction 80 kB • Remaining L1 instru
Slide 14: L1 Data SRAM vs. D-Cache
L1 Data SRAM vs. D-Cache When data exceed 16 or 32 kB, using BF531 L1 D-cache may not be sufficient 16 kB SRAM/ for optimal performance. L1 A Cache • Allocate memory for each type of data: • Read-only data (r)—static variables (e.g., tables) L1 Data 16 kB • Read/write data (r/w)—state variables • Te
Slide 15: L1 Data SRAM vs. D-Cache (cont.)
L1 Data SRAM vs. D-Cache (cont.) Using L1 data SRAM vs. L1 D-cache BF531 • Cache-only model 16 kB L1 A • Only use L1 data for D-cache. Cache • Data placement • All variables (r, r/w, temp) are placed in L3 and L1 Data 16 kB let D-cache do its job. • Pros • Perfect for audio-only applications or wher
Slide 16: L1 Data SRAM vs. D-Cache (cont.)
L1 Data SRAM vs. D-Cache (cont.) • Overlay model • L1 D-cache is turned off. BF533 • Data placement: • Place state variables (r/w) and static variables (r) OS, Temp/Data L1 A in L1 data SRAM overlays. etc. Overlay • Place temp variables (temp) in L1 data SRAM. L1 Data 64 kB • Place concurrent buffer
Slide 17: L1 Data SRAM vs. D-Cache (cont.)
L1 Data SRAM vs. D-Cache (cont.) • Overlay model (cont.) • Issues BF533 • If all data can fit in L1 data SRAM, do not use overlays but place data directly in L1 data SRAM. OS, Temp/Data L1 A • If multiple critical modules have a total data size > 64 kB etc. Overlay and cannot fit in L1 data SRAM, us
Slide 18: L1 Data SRAM vs. D-Cache
L1 Data SRAM vs. D-Cache • Hybrid model BF533 • L1 D-cache is turned on in write back mode. Temp/ • Use remaining L1 data for SRAM. 16 kB OS Data L1 A • Data Placement Cache etc. Over- lay • Place state variables (r/w) in L3 and let D-cache do its job. • Place static variables such as critical table
Slide 19: L1 Data SRAM vs. D-Cache (cont.)
L1 Data SRAM vs. D-Cache (cont.) BF531 • Audio example • Use cache model. L1 A Cache • Memory map • All data is in L3 and D-cache does its job. • Video example L1 Data 16 kB • Requires Blackfin processors with 64 kB of L1 data. • Use hybrid model, the best of both worlds. • Memory map BF533 • L1A—16
Slide 20: Cache and DMAs
Cache and DMAs Data coherency—outgoing data • Cache is not automatically flushed. • Data coherency issue can exist if peripheral DMAs read from SDRAM where the data is cached and not flushed. • Cached buffers must either be flushed before starting a peripheral DMA or be marked as non-cached in the C
Slide 21: Memory Pipelining
Memory Pipelining MemDMA to bring data into L1 data SRAM instead of using the D-cache • Use temp data in L1 data SRAM for I/O buffers. • Use memory DMAs to asynchronously transfer I/O data. • Execute code while DMAs are active. • Fetch next set of data, store last set of data while working on the cu
Slide 22: L1 Data Scratchpad
L1 Data Scratchpad L1 data scratchpad is 4 kB for all processors. • Cannot be used for D-cache. • Cannot be accessed with DMAs. • Best use is stack. For non-OS environments or single task solutions, place stack in the scratchpad. For RTOS solutions, each task must have its own stack. • Place most cr
Slide 23: Optimizing External Memory Use
Optimizing External Memory Use 23 Blackfin Optimizations for Performance and Power Consumption
Slide 24: Memory Settings
Memory Settings It is important to set memory priorities correctly. • In most Blackfin processors, the peripheral DMAs can be set to have higher priority than core access to L3 (instruction and data). This is critical to avoid peripheral FIFO underruns/overruns. • Some Blackfin processors allow for
Slide 25: External Memory Banks
External Memory Banks Each Blackfin supports at least 1 external memory bank of SDRAM. 8MB Bank 0 • Each external SDRAM banks consists of 8MB 4 sub-banks. Bank 1 BF533 • At any time, only 1 page is open in each of 8MB Bank 2 the 4 sub-banks. 8MB • Accesses to open pages improve performance. Bank 3 •
Slide 26: External Memory Banks (cont.)
External Memory Banks (cont.) Audio example (Mobile SDRAM) • Place all buffers in one bank. • Place other banks in self-refresh to save on power. Video example • For video decoders/encoders • Place two input reference frames in separate banks. • Place output frame in one of the remaining banks. • Pl
Slide 27: OS and Contiguous Memory
OS and Contiguous Memory Some RTOS’s and µClinux require that the memory used by the OS be a single contiguous block. With these OS’s, the bank of a data buffer cannot be guaranteed. The following diagram shows how to use three banks of SDRAM for data buffers while leaving over half of the memory fo
Slide 28: Power Modes
Power Modes 28 Blackfin Optimizations for Performance and Power Consumption
Slide 29: Hibernate and Sleep Modes
Hibernate and Sleep Modes Hibernate mode • Best power savings for non-real-time systems. • This mode should be used for long idle periods when peripherals are not used continuously. • Core power and core clock are turned off. • L1 memory and registers are not maintained. • Consumes only ~50 uA of cu
Slide 30: Hibernate and Sleep Modes (cont.)
Hibernate and Sleep Modes (cont.) Deep sleep mode • Specific peripheral interrupts including the RTC can wake up the processor. • Not as convenient as sleep mode and power consumption is not much. 30 Blackfin Optimizations for Performance and Power Consumption
Slide 31: Frequency and Voltage
Frequency and Voltage In order to conserve power on the Blackfin, be aware of the different tiers of speed and voltage. Here’s an example: • <= 250 MHz 0.80 V • <= 280 MHz 0.85 V • <= 333 MHz 0.95 V • <= 363 MHz 1.045 V • <= 400 MHz 1.14 V (refer to your processor datasheet) The static current on a
Slide 32: Frequency and Voltage Audio
Frequency and Voltage Audio Audio example (Blackfin BF531 400 MHz) • Audio decode plus post-processing consumes 54 MIPS. • Set voltage = 0.8 V, Core clock = 243 MHz. • Sleep 78% of the time. • Audio DMA frame completion interrupts wake-up processor. • Consumes ~17 mW core (dynamic + static) at 25C.
Slide 33: Frequency and Voltage Video QVGA
Frequency and Voltage Video 1 QVGA Video example 1 (Blackfin BF533 600 MHz) • QVGA decode example consumes 183 MIPS. • Set voltage = 0.8 V, Core clock = 243 MHz. • Sleep 25% of the time. • Consumes ~58 mW core (dynamic + static) at 25C. 600 MIPS 1.2 V Blackfin BF533 600 MHz Power >320 mW 350.0 183 M
Slide 34: Frequency and Voltage Video
Frequency and Voltage Video 2 Video example 2 (Blackfin BF533 600 MHz) • WQVGA (480 x 270) decode example with graphics consumes 303 MIPS. • Set voltage = 0.85 V, Core clock = 351 MHz. • Sleep 14% of the time. • Consumes ~88 mW core (dynamic + static) at 25C. 600 MIPS 1.2 V Blackfin BF533 600 MHz Po
Slide 35: System Power and External Memory Speed
System Power and External Memory Speed Reducing external memory speed reduces system power consumption. • System performance degrades when memory accesses exceed half total memory bandwidth. • Calculate number of memory accesses per second in order to calculate minimum memory bandwidth. • Adjust sys
Slide 36: System Power and External Memory Speed (cont.)
System Power and External Memory Speed (cont.) Balance reduction of memory speed against core performance for lowest system power consumption. • Slowing down memory speed can cause MIPS to increase. • Make sure that MIPS does not exceed MHz. • Balance power savings for memory against power loss for
Slide 37: System Power and External Memory Speed (cont.)
System Power and External Memory Speed (cont.) Video example • QVGA decode at 500 kbps • Memory accesses = 500 kbps + 320 x 240 x 12 bpp x 3 ref frames x 30 fps (decode) + 320 x 240 x (12 bpp + 18 bpp) x 30 fps (post-proc) + 320 x 240 x 3 bpp x 60 fps (display) = 17 million accesses per second Î 35
Slide 38: External Memory Banks for Mobile SDRAM
External Memory Banks for Mobile SDRAM Memory power consumption is directly related to the number of active banks. • For example, with 1.8 V Mobile SDRAM, one bank consumes ~1 mW in self-refresh mode as opposed to ~20 mW in active mode. • Place as many banks in self-refresh as possible for the task
Slide 39: External Memory Banks for Mobile SDRAM (cont.)
External Memory Banks for Mobile SDRAM (cont.) Audio example • Audio decode + audio post-processing example = 54 MIPS with one bank • Keep one bank active and place three banks in self-refresh for a net savings of ~60 mW system wide! Video example • QVGA video example = 183 MIPS with four banks • Vi
Slide 40: Conclusion
Conclusion To fully optimize your system for increased performance and/or reduced power consumption, it requires a diligent look at: • Voltage and frequency settings • L1 settings and use • L3 settings and use • Power modes • Experiment Blackfin processor architecture is filled with many ways to inc
Slide 41: For Additional Information
For Additional Information Analog Devices website which has links to white papers, manuals, data sheets, FAQs, Knowledge Base, sample code, development tools and much more: • www.analog.com/blackfin For specific questions click on the “Ask a question” button. 41 Blackfin Optimizations for Performanc
Slide 42: Demos
Demos 42 Blackfin Optimizations for Performance and Power Consumption
Slide 43: Demos
Demos Example implementation for the Blackfin family of a low power portable media player • BF533 EZ-KIT Lite® Audio only example • AAC-LC audio decode • Audio sample rate converter • 54 MHz, 0.8 V, ~39 mW (~17 mW = BF531) core power for audio-only playback Audio/Video example • QVGA MPG4 ASP • Vide