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Synopsys Introduces Software-Defined Hardware-Assisted Verification to Enable AI Proliferation
New product capabilities deliver leading performance, capacity, and industry-first hardware-assisted test-automation capabilities to accelerate AI silicon
About this update from Synopsys, Inc.
[{"type":"text","content":"New product capabilities deliver leading performance, capacity, and industry-first hardware-assisted test-automation capabilities to accelerate AI silicon innovation from data center to edgeKey HighlightsSoftware-defined approach enables an up to 2x performance boost for ZeBu Server 5 and scales capacity up to 2x with modular HAV for AI-era mega designsNew HAPS-200 12 FPGA and ZeBu-200 12 FPGA platforms for mainstream designs feature EP‑Ready Hardware that extends emulation and prototyping capacity by 2x and delivers leading performance for emulation and prototyping use cases New, industry-first hardware-assisted test automation capabilities enable faster, earlier detection of cache‑coherency and subsystem‑level bugs for maximum coverageSUNNYVALE, Calif., March 11, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced advancements across its leading hardware-assisted verification (HAV) portfolio, including new hardware platforms and capabilities to support the ever-expanding demand for AI chip verification from the data center to the edge. Synopsys HAV platforms, powered by the company's unique software-defined capabilities, set new performance, scalability, and use case benchmarks for verifying the world's most sophisticated multi-die and AI chips amidst compounding design complexity and time-to-market requirements.\n \n \n \n \n \n \n \nAI chip verification complexity is escalating rapidly as large language models continue to double in size roughly every four months, and interface data rates advance at a 2x rate every three years. Simultaneously, edge AI architectures are driving aggressive throughput, latency, and power‑efficiency targets that further expand the design and validation workload. To keep pace, the industry requires HAV solutions to support broader application coverage and run quadrillions of verification cycles, enabling first‑time‑right silicon and a seamless ability to integrate heterogeneous AI systems.\"As AI-driven systems become more complex, verification must scale just as quickly. Hardware-assisted verification is no longer optional. It is critical to meeting aggressive time-to-market goals and ensuring silicon readiness,\" said Salil Raje, Senior Vice President and General Manager, Adaptive and Embedded Computing Group, AMD. \"FPGA-based emulation and prototyping play a central role in that...