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Synopsys Expands Multi-Die Solution Leadership with Industry's Lowest Latency Die-to-Die Controller IP
Complete DesignWare Die-to-Die Controller and PHY IP Solution Maximizes Performance for Efficient Inter-Die Connectivity in High-Performance Computing, AI and

About this update from Synopsys, Inc.
[{"type":"text","content":"Complete DesignWare Die-to-Die Controller and PHY IP Solution Maximizes Performance for Efficient Inter-Die Connectivity in High-Performance Computing, AI and Networking SoCs\n\n\nMOUNTAIN VIEW, Calif., June 3, 2021 /PRNewswire/ --\nHighlights of this Announcement:\nThe complete DesignWare Die-to-Die IP solution, including controller, 112G USR/XSR and HBI PHYs, supports die splitting and compute scaling New Die-to-Die Controller's error correction mechanisms with replay and optional forward error correction minimize bit error rate for reliable die-to-die links Low-latency architecture supports AMBA CXS for efficient interface with Arm® Neoverse™ Coherent Mesh Network Synopsys provides a complete multi-die solution with Die-to-Die IP, HBM IP and 3DIC Compiler for system-in-package integration Synopsys, Inc. (Nasdaq: SNPS) today announced its new DesignWare® Die-to-Die Controller IP, which complements the company's existing 112G USR/XSR PHY IP for a complete die-to-die IP solution. With the complete IP solution, designers benefit from a low-latency, high-bandwidth die-to-die connectivity offering that addresses the increased workload and faster data movement demands of high-performance computing, artificial intelligence (AI) and networking SoCs. The DesignWare Die-to-Die Controller and PHY IP are part of the Synopsys multi-die solution, consisting of HBM IP and 3DIC Compiler, accelerating SoC designs requiring advanced packaging. \n\"Interconnect technology is increasingly vital for the next-generation of performant, customized infrastructure SoCs,\" said Jeff Defilippi, director of product management, Infrastructure Line of Business, Arm. \"With its low-latency, native support for AMBA CXS, Synopsys DesignWare Die-to-Die Controller can easily integrate with the Arm Coherent Mesh Network to provide our mutual customers access to the multichip IP solutions offering new scale-up performance and composability options required for this next era of infrastructure compute.\"\nThe DesignWare Die-to-Die Controller provides error recovery mechanisms such as optional forward-error correction and cyclic redundancy check for higher data integrity and link reliability. The DesignWare Die-to-Die controller's flexible configuration supporting the AMBA® CXS and AXI protocols allows coherent and non-coherent data communication for easy integration...