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Synopsys and TSMC Collaborate to Enable Designs of HPC, Mobile, 5G, and AI SoCs with Certified Solutions on TSMC N5 and N6 Processes

Strategic collaboration with TSMC delivers additional gains in performance and ultra-low power, and accelerates the path to next-generation designs MOUNTAIN

articleSynopsys, Inc.May 18, 20205/company/synopsys-inc/news/synopsys-and-tsmc-collaborate-to-enable-designs-of-hpc-mobile-5g-and-ai-socs-with-certified-solutions-on-tsmc-n5-and-n6-processes
Synopsys and TSMC Collaborate to Enable Designs of HPC, Mobile, 5G, and AI SoCs with Certified Solutions on TSMC N5 and N6 Processes

About this update from Synopsys, Inc.

[{"type":"text","content":"Strategic collaboration with TSMC delivers additional gains in performance and ultra-low power, and accelerates the path to next-generation designs\n\n\nMOUNTAIN VIEW, Calif., May 18, 2020 /PRNewswire/ --\nHighlights:\nCustomers in production on N5 and N6 benefit from Synopsys tools and TSMC process Latest tool certifications on N5 and N6 process technologies deliver enhanced PPA Implementation using certified timing and extraction reduces time to marketSynopsys, Inc. (Nasdaq: SNPS) today announced certification of its digital and custom design platforms for TSMC's N6 and N5 process technologies. Synopsys' long-term collaboration with TSMC has resulted in accelerating next-generation product design for key vertical markets, including high-performance computing (HPC), mobile, 5G, and AI chip designs. \nThis achievement is the result of an extensive, multi-year collaboration to deliver optimized design solutions that accelerate the path to next-generation designs with innovations providing improvements in power savings and design performance. Synopsys' collaboration with TSMC also extends to 3DIC process technologies, which include CoWoS®, InFO, and TSMC-SoIC™ that enable scalable integration for achieving greater functionality and enhanced system performance.\n\"TSMC works closely with ecosystem partners to ensure that semiconductor designers can meet next-generation requirements for performance and low power in high-growth markets using TSMC's latest process technologies,\" said Suk Lee, senior director of the Design Infrastructure Management Division at TSMC. \"We look forward to continuing our joint efforts with Synopsys to help our mutual customers unleash their silicon innovations for high-performance computing, mobile, 5G, and AI applications.\"\nCertified innovations in multiple Synopsys design tools for HPC and mobile design flows enable designers to take full advantage of TSMC's N6 and N5 process technologies that enhance density, operating frequency, and power consumption. Tools also have been improved to support ultra-low VDD requirements for low power consumption mobile and 5G designs. As part of the design flow platform certification, results from Synopsys StarRC™ and PrimeTime® signoff solutions were rigorously compared to implementation results. PrimeTime® timing reports were also well compared to the golden HSPICE...

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