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Samsung Foundry Certifies Synopsys Design Compiler NXT for 5/4nm FinFET Process Technologies
More than 100 customers have adopted Design Compiler NXT since its introduction one year ago MOUNTAIN VIEW, Calif., June 1, 2020 /PRNewswire/ -- Highlights:
About this update from Synopsys, Inc.
[{"type":"text","content":"More than 100 customers have adopted Design Compiler NXT since its introduction one year ago\n\n\nMOUNTAIN VIEW, Calif., June 1, 2020 /PRNewswire/ --\nHighlights:\nCustomers adopting Design Compiler NXT report significant reduction in runtimes together with improvements in power, performance and area (PPA) New advanced optimizations, such as concurrent clock and data (CCD) optimization, are essential for meeting PPA goals at advanced nodes Samsung Foundry customers benefit from an 8 to 10 percent improvement in PPA that Design Compiler NXT delivered in the qualification process with 2X faster throughputSynopsys, Inc. (Nasdaq: SNPS) today announced that the Synopsys Design Compiler® NXT synthesis solution has been qualified by Samsung Foundry for its 5/4-nanometer FinFET process technologies. Design Compiler NXT, an integral part of the Synopsys Fusion Design Platform™ solution, is the latest innovation in the Design Compiler family of RTL synthesis products, extending the market-leading synthesis position of Design Compiler Graphical. It has surpassed well over 100 customer deployments since its release in March 2019. \nDesign Compiler NXT features fast, highly efficient optimization engines and a new approach to distributed synthesis that does not sacrifice quality-of-results (QoR). Customers adopting Design Compiler NXT are reporting significant reduction in runtimes together with improvements in power, performance and area (PPA). In the 5/4nm FinFET processes, Samsung Foundry observed an 8 to 10 percent improvement in PPA with a 2X faster throughput with Design Compiler NXT.\n\"As a leading provider of advanced-node foundry services, we strive to provide our customers with production silicon that meets or exceeds their power, performance and area goals,\" said Sangyun Kim, vice president of Design Technology Team at Samsung Electronics. \"Through our extensive collaboration with Synopsys, we are enabling our customers to use best-in-class tools like Design Compiler NXT for the Samsung Foundry 5/4nm FinFET processes so they can successfully achieve their PPA targets.\" \nDesign Compiler NXT features new advanced optimizations, such as power-driven mapping and structuring techniques and concurrent clock and data (CCD) optimization, that are essential to meet PPA goals at advanced nodes. To deliver tight correlation and superior...