Business
Chiplet Summit Announces Keynote Speakers
SANTA CLARA, Calif., February 02, 2026--Chiplet Summit, the biggest conference totally dedicated to chiplets, today announced the keynotes for its fourth annual event, February 17-19, at the Santa Clara Convention Center.
About this update from Synopsys, Inc.
[{"type":"image","alt":"","displaySize":"","headline":null,"caption":"","credit":null,"className":"","disableSlideshowImg":false,"size":{"original":{"width":480,"height":325,"url":"https://media.zenfs.com/en/business-wire.com/214a56ed512242b9f15349c3758802ee"},"resized":{"url":"https://s.yimg.com/ny/api/res/1.2/t.JMhnLa_yqxk1gkw4yNpA--/YXBwaWQ9aGlnaGxhbmRlcjt3PTk2MDtoPTY1MDtjZj13ZWJw/https://media.zenfs.com/en/business-wire.com/214a56ed512242b9f15349c3758802ee","width":480,"height":325}},"lazy":false},{"type":"text","content":"Industry Experts Offer Insight into Skyrocketing Chiplet Industry","length":65,"tagName":"p","attribs":{}},{"type":"text","content":"SANTA CLARA, Calif., February 02, 2026--(BUSINESS WIRE)--Chiplet Summit, the biggest conference totally dedicated to chiplets, today announced the keynotes for its fourth annual event, February 17-19, at the Santa Clara Convention Center.","length":238,"tagName":"p"},{"type":"text","content":""We have remarkable keynotes for the largest Chiplet Summit ever. They will highlight how chiplets are reshaping the semiconductor industry," said Chuck Sobey, General Chair of Chiplet Summit.","length":202,"tagName":"p"},{"type":"text","content":"Wednesday Keynotes:","length":19,"tagName":"p"},{"type":"list","items":[{"val":[{"type":"text","content":"Abhijeet Chakraborty, VP Engineering, Synopsys – Leads multi-die and 3D heterogeneous integration technologies. Will discuss how AI is improving multi-die design through advanced automation and intelligent design integration.","length":225,"tagName":"p","attribs":{}}]},{"val":[{"type":"text","content":"Letizia Giuliano, VP Product Marketing/Management, Alphawave Semi – Specializes in high-speed connectivity and chiplet system design. Will cover the progression from early chiplet adoption to mainstream deployment in scalable, interoperable system-level architectures.","length":268,"tagName":"p","attribs":{}}]},{"val":[{"type":"text","content":"Juan C. Rey, Sr VP, Siemens EDA – GM Calibre Segment. Will examine barriers to 3D IC performance and introduce AI-driven strategies to accelerate design convergence and reduce costs.","length":182,"tagName":"p","attribs":{}}]},{"val":[{"type":"text","content":"Debendra Das Sharma, Board Member, UCIe – Co-inventor of UCIe. Will highlight advances in chiplet interconnect standards and their role in enabling modular, scal...