Business
Rivian Unveils Custom Silicon, Next-Gen Autonomy Platform, and Deep AI Integration at Inaugural Autonomy & AI Day
American automotive technology company showcases roadmap toward global leadership in AI-defined vehicles and ownership experience PALO ALTO,
About this update from Rivian Automotive, Inc.
[{"type":"text","content":"\nAmerican automotive technology company showcases roadmap toward global leadership in AI-defined vehicles and ownership experience\n\n PALO ALTO, Calif.--(BUSINESS WIRE)--\nRivian (NASDAQ: RIVN) today announced significant breakthroughs in vertically integrated automotive technology at its first Autonomy & AI Day. During the event at its Palo Alto offices, the company unveiled its proprietary, purpose-built silicon, outlined its roadmap for next-generation vehicle autonomy, and introduced an evolved software architecture underpinned by artificial intelligence (AI).\n\n“I couldn’t be more excited for the work our teams are driving in autonomy and AI. Our updated hardware platform, which includes our in-house 1600 sparse TOPS inference chip, will enable us to achieve dramatic progress in self-driving to ultimately deliver on our goal of delivering L4. This represents an inflection point for the ownership experience – ultimately being able to give customers their time back when in the car,” said Rivian Founder and CEO RJ Scaringe.\n\nRivian Autonomy Processor and Gen 3 Autonomy Computer\n\nAt the core of Rivian’s technology roadmap is the transition to in-house silicon, designed specifically for the vision-centric physical AI. The first generation Rivian Autonomy Processor (RAP1) is a custom 5nm processor that integrates processing and memory onto a single multi-chip module. This architecture delivers advanced levels of efficiency, performance, and Automotive Safety Integrity Level compliance.\n\nRAP1 powers the company’s third-generation Autonomy computer, the Autonomy Compute Module 3 (ACM3). Key specifications of the ACM3 include:\n\n\n1600 sparse INT8 TOPS (Trillion Operations Per Second).\n\n\nThe processing power of 5 billion pixels per second.\n\n\nRAP1 features RivLink, a low latency interconnect technology allowing chips to be connected to multiply processing power, making it inherently extensible.\n\n\nRAP1 is enabled by an in-house developed AI compiler and platform software.\n\n\nIn addition to ACM3, Rivian plans to integrate LiDAR into future R2 models. LiDAR will augment the company’s multi-modal sensor strategy, providing detailed, three-dimensional spatial data and redundant sensing, and improving real-time detection for the edge cases of driving.\n\nOur Gen 3 Autonomy hardware including ACM3 and LiDAR is currently...