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QuickLogic Announces First eFPGA IP From Australis IP Generator on UMC 22nm Process
- First user-customized eFPGA IP generated by Australis IP Generator for UMC - Enables generation of custom eFPGA IP in just weeks - Supported by complete
About this update from Quicklogic Corporation
[{"type":"text","content":"- First user-customized eFPGA IP generated by Australis IP Generator for UMC\n - Enables generation of custom eFPGA IP in just weeks\n - Supported by complete QuickLogic Aurora software suite as well as 100% Open-Source User Tools\n\n\nSAN JOSE, Calif., Oct. 26, 2021 /PRNewswire/ -- QuickLogic Corporation (NASDAQ: QUIK), a developer of ultra-low power multi-core voice-enabled SoCs, embedded FPGA IP, and Endpoint AI solutions, today announced the availability of its first customer-defined eFPGA block from the Australis IP Generator for the UMC 22nm process. The Australis tool enables rapid eFPGA IP generation for nearly any foundry and node. This eFPGA IP core is available now, and any future customizations of it for companies using this same foundry/process node combination can be completed in mere weeks.\n\n \n \n \n \n \n \n\n \nThe new eFPGA IP will be integrated into customers' SoC designs and is supported by the complete QuickLogic Aurora software tool suite as well as a wide range of open-source tools. \nBy integrating an embedded FPGA IP, customers gain the flexibility to make RTL design changes post-production. Such changes enable a single SoC to serve multiple, adjacent applications, or to evolve with changing standards, while also allowing for the addition of new features to address competitive changes in the marketplace. As a result, the market opportunity and useful product life of high-investment SoCs can be dramatically extended, increasing profitability and product ROI. Particular benefits are expected for smart IoT, industrial, security, aerospace, healthcare, and high reliability markets.\n\"Historically, customers interested in adding embedded FPGA IP to their SoC designs have had a very limited selection of array sizes and foundry/process node combinations,\" said Brian Faith, QuickLogic's chief executive officer. \"With capabilities enabled by our Australis tool, we have solved this challenge. Now we can customize the eFPGA IP, choose the specific process/node, and complete our customers' designs in a very short period.\"\nAvailabilityThe Australis eFPGA IP Generator, including support for the UMC 22nm process, is available now. SoC customers can start designing today and have a customized, ready-to-integrate eFPGA IP block in a matter of weeks. For more information, please visit https://www.quicklogic.com/pr...