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Lattice Launches Industry-First PQC-Ready FPGA Family: MachXO5-NX TDQ

‒ Sets new standard for secure control FPGAs with full CNSA 2.0-compliant post-quantum cryptography, crypto-agility, and hardware root of trust for

articleLattice Semiconductor CorporationOctober 13, 20255/company/lattice-semiconductor-corporation/news/lattice-launches-industry-first-pqc-ready-fpga-family-machxo5-nx-tdq-2025-10-13
Lattice Launches Industry-First PQC-Ready FPGA Family: MachXO5-NX TDQ

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[{"type":"text","content":"\n‒ Sets new standard for secure control FPGAs with full CNSA 2.0-compliant post-quantum cryptography, crypto-agility, and hardware root of trust for next-generation infrastructure ‒\n\n\n HILLSBORO, Ore.--(BUSINESS WIRE)--\nLattice Semiconductor (NASDAQ: LSCC), the low power programmable leader, today introduced the Lattice MachXO5™-NX TDQ family, the industry’s first secure control FPGAs with full Commercial National Security Algorithm (CNSA) 2.0-compliant post-quantum cryptography (PQC) support. Built on the award-winning Lattice Nexus™ platform, MachXO5-NX TDQ FPGAs deliver unmatched security, reliability, and flexibility for Computing, Communications, Industrial, and Automotive applications as the threat of quantum-enabled cyberattacks rises.\n\n\n“Quantum computing advances increase the urgency to adopt quantum-resistant security across every industry,” said Esam Elashmawi, Chief Strategy and Marketing officer, Lattice Semiconductor. “With MachXO5-NX TDQ, Lattice is first to market with a secure control FPGA family that not only meets today’s security mandates but also delivers crypto-agility and hardware root of trust to future-proof our customers’ infrastructure against evolving threats.”\n\n\nThe Lattice MachXO5-NX TDQ FPGA family equips customers with:\n\n\n\nFull Suite of CNSA 2.0 Compliant PQC\n\n\nFirst and only complete CNSA 2.0 and National Institute of Standards and Technology (NIST)-approved PQC algorithms (LMS, XMSS, ML-DSA, ML-KEM, AES256-GCM, SHA2, SHA3, SHAKE) for robust protection against quantum threats\n\n\n\nAuthenticated and/or encrypted bitstream ensuring data integrity and protection against unauthorized access with ML-DSA, LMS, XMSS, AES256\n\n\n\nUnique, patent pending crypto-agility with in-field algorithm update capability and anti-rollback version protection to enable ongoing alignment with evolving standards\n\n\n\nSecure bitstream key management with revokable root keys and sophisticated key hierarchy for both PQC and classical keys\n\n\n\n\n\n\nAdvanced Cryptography\n\n\nFull complement of advanced symmetric and classical asymmetric cryptographic algorithms (AES-CBC/GCM 256 bit, ECDSA-384/521, SHA-384/512, RSA 3072/4096 bit) for bitstream and user data protection\n\n\n\nDevice Identifier Composition Engine (DICE), Security Protocol and Data Model (SPDM), and Lattice SupplyGuard™ capable, provi...

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