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New Cadence Tensilica FloatingPoint DSP Family Delivers Scalable Performance for a Broad Range of Compute-Intensive Applications
Low-energy DSP IP optimizes power, performance and area, offering up to 40% area savings for mobile, automotive, consumer and hyperscale computing markets
About this update from Cadence Design Systems, Inc.
[{"type":"text","content":"\nLow-energy DSP IP optimizes power, performance and area, offering up to 40% area savings for mobile, automotive, consumer and hyperscale computing markets\n\n SAN JOSE, Calif.--(BUSINESS WIRE)--\nCadence Design Systems, Inc. (Nasdaq: CDNS) today unveiled the Cadence® Tensilica® FloatingPoint DSP family, which provides a scalable and configurable solution designed specifically for floating-point-centric workloads. Optimized for power, performance and area (PPA), the new DSP IP cores extend from small, ultra-low power to very high performance and are well-suited for a broad array of applications. These range from energy-efficient solutions for battery-operated devices to artificial intelligence/machine learning (AI/ML), motor control, sensor fusion, object tracking and augmented reality/virtual reality (AR/VR) applications in the mobile, automotive, hyperscale computing and consumer markets.\nThis press release features multimedia. View the full release here: https://www.businesswire.com/news/home/20210617005326/en/The highly scalable Cadence® Tensilica® FloatingPoint DSP family offers system-on-chip designers peace of mind when designing a solution that meets their power, performance and area budget. When much higher performance and clock speed are required, the FloatingPoint KQ7 and KQ8 DSPs provide greater throughput. (Graphic: Business Wire)\nThe new family is comprised of four cores: the Tensilica FloatingPoint KP1 DSP, the Tensilica FloatingPoint KP6 DSP, the Tensilica FloatingPoint KQ7 DSP and the Tensilica FloatingPoint KQ8 DSP. Early customer feedback has been overwhelmingly positive, with evaluations demonstrating significant benefits in PPA. For more information on the new DSPs, please visit www.cadence.com/go/tensilicafloatingpoint.\n\n“Floating-point numbers, common in technical computations, underpin a host of radar applications that process large or unpredictable data sets. We’ve successfully collaborated with Cadence on multiple generations of IP cores and are pleased to see them addressing this critical market need and expanding their proven Tensilica product line,” said Ian Podkamien, VP and Head of Automotive at Vayyar Imaging. “FloatingPoint DSPs optimized for a variety of applications can enable Vayyar’s system-on-chip sensors to improve energy efficiency and performance across the automotive, elder care, sm...