Press release
New Cadence Joint Enterprise Data and AI Platform Dramatically Accelerates AI-Driven Chip Design Development
Highlights: The new Cadence platform is a critical big data analytics infrastructure that unifies massive data sets across all Cadence computational software
About this update from Cadence Design Systems, Inc.
[{"type":"text","content":"\nHighlights:\n\n\nThe new Cadence platform is a critical big data analytics infrastructure that unifies massive data sets across all Cadence computational software\n\n\nEnables a new generation of Cadence AI-driven design and verification applications that dramatically improve productivity and PPA\n\n\n \n\n SAN JOSE, Calif.--(BUSINESS WIRE)--\nCadence Design Systems, Inc. (Nasdaq: CDNS) today announced the delivery of the Cadence® Joint Enterprise Data and AI (JedAI) Platform, enabling a generational shift from single-run, single-engine algorithms in electronic design automation (EDA) to algorithms that leverage big data and artificial intelligence (AI) to optimize multiple runs of multiple engines across an entire SoC design and verification flow. The Cadence JedAI Platform enables engineers to glean actionable intelligence from massive volumes of chip design and verification data, opening the door to a new generation of AI-driven design and verification tools that dramatically improve productivity and power, performance and area (PPA). With the Cadence JedAI Platform, Cadence is unifying big data analytics across its AI platforms—Verisium™ verification, Cadence Cerebrus™ implementation, and Optimality™ system optimization—as well as third-party silicon lifecycle management systems.\nThis press release features multimedia. View the full release here: https://www.businesswire.com/news/home/20220913005383/en/The new Cadence(R) Joint Enterprise Data and AI (JedAI) Platform is enabling a generational shift from single-run, single-engine algorithms in EDA to algorithms that leverage big data and AI to optimize multiple runs of multiple engines across an entire SoC design and verification flow. (Photo: Business Wire)\nWith the new Cadence JedAI Platform, engineers can seamlessly manage both structured and unstructured data, including:\n\n\nDesign data such as waveforms and coverage in functional verification, physical layout shapes, timing/power/voltage/variation analysis reports, design RTL, netlist and SDC specifications in design implementation\n\n\nWorkload data such as runtime, memory usage and disk space usage, as well as metadata about the inputs to each job and dependencies between them\n\n\nWorkflow data such as the tools and methodology used to create a design\n\n\nThe Cadence JedAI Platform makes it easier to manage desi...