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Cadence Delivers 10 New Verification IP Targeting Automotive, Hyperscale Data Center and Mobile Applications

Latest additions to the portfolio deliver improved verification throughput to ensure SoCs and microcontrollers meet industry standards SAN JOSE,

articleCadence Design Systems, Inc.May 19, 20203/company/cadence-design-systems-inc/news/cadence-delivers-10-new-verification-ip-targeting-automotive-hyperscale-data-center-and-mobile-applications
Cadence Delivers 10 New Verification IP Targeting Automotive, Hyperscale Data Center and Mobile Applications

About this update from Cadence Design Systems, Inc.

[{"type":"text","content":"\nLatest additions to the portfolio deliver improved verification throughput to ensure SoCs and microcontrollers meet industry standards\n\n SAN JOSE, Calif.--(BUSINESS WIRE)--\nCadence Design Systems, Inc. (Nasdaq: CDNS) today announced the availability of 10 new Verification IP (VIP) solutions that allow engineers to quickly and effectively verify their designs to meet the specifications for the latest standards protocols. The expansion of the Cadence® VIP portfolio supports customers developing SoCs and microcontrollers for automotive, hyperscale data center and mobile applications, including with CXL, HBM3, TileLink and MIPI® CSI‑2sm 3.0.\n\n\nThe Cadence VIP are part of the Cadence Verification Suite and support the company’s Intelligent System Design™ strategy. The Cadence Verification Suite is comprised of core engines and verification fabric technologies that increase verification throughput and design quality, fulfilling verification requirements for a wide variety of applications and vertical segments. For more information about Cadence VIP solutions for automotive, hyperscale data center and mobile applications, please visit www.cadence.com/go/NewVIP.\n\n\n“Our team has been using Cadence’s VIP for CSI-2 and UFS, which helped us to deliver industry-leading solutions for automotive, industrial and IoT applications,” said Toshinori Inoshita, Director, Design Methodology Department, Shared R&D EDA Division at Renesas Electronics Corporation. “Cadence continuously provides VIP offerings that meet the industry’s latest standards. We plan to continue our collaboration with Cadence to advance the development of our next-generation products.”\n\n\nThe new Cadence VIP offer customers a comprehensive verification solution for the most complex protocols. Customers have access to a consistent API across all VIP with complete bus functional models (BFMs), integrated protocol checks and coverage models, ensuring they can rapidly adopt the appropriate VIP needed for their design. The new VIP solutions support multiple application areas and specifications, including:\n\n\n\nHyperscale data center:\n\n\nCXL – Compute Express Link™\n\n\nHBM3\n\n\nEthernet 802.3ck\n\n\n\n\nAutomotive:\n\n\nCSI-2 3.0\n\n\nMIPI I3C® 1.1\n\n\n\n\nConsumer and mobile:\n\n\nTileLink\n\n\neUSB2\n\n\nUFS 3.1\n\n\nMIPI SPMIsm\n\n\nMIPI RFFEsm v3.0\n\n\n\n\n\nAd...

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