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Cadence Achieves Digital and Custom/Analog EDA Flow Certification for TSMC N6 and N5 Process Technologies
Companies collaborate to accelerate mobile and hyperscale electronics innovation Highlights: Cadence digital, signoff, and custom/analog tools achieve latest
About this update from Cadence Design Systems, Inc.
[{"type":"text","content":"\nCompanies collaborate to accelerate mobile and hyperscale electronics innovation\n\n\nHighlights:\n\n\n\nCadence digital, signoff, and custom/analog tools achieve latest DRM and SPICE certification for TSMC N6 and N5 process technologies\n\n\nCadence integrated digital full flow features enhanced physical optimization and timing signoff closure that’s certified for TSMC’s strategic HPC and mobile platforms\n\n\n SAN JOSE, Calif.--(BUSINESS WIRE)--\nCadence Design Systems, Inc. (Nasdaq: CDNS) today announced that its digital full flow and custom/analog tool suites have been further enhanced to deliver optimal results on TSMC’s N6 and N5 process technologies. The Cadence® tool suites have achieved Design Rule Manual (DRM) and SPICE certification for TSMC’s latest N6 and N5 process technologies. These advancements allow next-generation mobile application development at N6 and N5 and hyperscale application development on N5 with updated reference flows and methodologies. Cadence and TSMC are working with customers on production designs on TSMC’s advanced processes including N7, N6 and N5 and have enabled real-world tapeouts across those nodes worldwide.\n\n\nThe certified tool suites support the Cadence Intelligent System Design™ strategy, enabling customers to achieve SoC design excellence. Cadence’s integrated flow ensures it is fully convergent and all tools work together seamlessly. Customers can download the corresponding N6 and N5 process design kits (PDKs) to begin design projects now. To learn more about the Cadence advanced-node solutions, visit www.cadence.com/go/advancednodepr.com.\n\n\nN6 and N5 Digital and Signoff Tool Suite Certification \n\n\nCadence has further improved its fully integrated digital full flow, which continues to be certified on both TSMC’s N6 and N5 process technologies. The certified Cadence digital full flow features enhanced physical optimization and timing signoff closure. It includes the Innovus™ Implementation System, Liberate™ Characterization, Liberate Variety™ Statistical Characterization, Quantus™ Extraction Solution, Tempus™ Timing Signoff Solution, Voltus™ IC Power Integrity Solution and Pegasus™ Verification System. Additionally, the Genus™ Synthesis Solution and its latest predictive iSpatial technology is enabled for these process technologies for both mobile and hyperscale designs.\n...