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Cadence Accelerates System Innovation with Breakthrough Integrity 3D-IC Platform
Industry’s first comprehensive 3D-IC platform for multi-chiplet design and advanced packaging Highlights: Integrity 3D-IC integrates design planning,
About this update from Cadence Design Systems, Inc.
[{"type":"text","content":"\nIndustry’s first comprehensive 3D-IC platform for multi-chiplet design and advanced packaging Highlights:\n\n\nIntegrity 3D-IC integrates design planning, implementation and system analysis in a single, unified cockpit\n\n\nDesigners can achieve system-driven PPA through the availability of integrated thermal, power and static timing analysis capabilities\n\n\nCadence’s third-generation 3D-IC solution supports a wide range of application areas, including hyperscale computing, consumer, 5G communications, mobile and automotive\n\n\n SAN JOSE, Calif.--(BUSINESS WIRE)--\nCadence Design Systems, Inc. (Nasdaq: CDNS) today announced the delivery of the Cadence® Integrity™ 3D-IC platform, the industry’s first comprehensive, high-capacity 3D-IC platform that integrates 3D design planning, implementation and system analysis in a single, unified cockpit. The Integrity 3D-IC platform underpins Cadence’s third-generation 3D-IC solution, providing customers with system-driven power, performance and area (PPA) for individual chiplets through integrated thermal, power and static timing analysis capabilities.\nThis press release features multimedia. View the full release here: https://www.businesswire.com/news/home/20211006006020/en/The Cadence® Integrity™ 3D-IC platform is the industry’s first comprehensive, high-capacity 3D-IC platform that integrates 3D design planning, implementation and system analysis in a single, unified cockpit. (Graphic: Business Wire)\nChip designers creating hyperscale computing, consumer, 5G communications, mobile and automotive applications can achieve greater productivity with the Integrity 3D-IC platform versus a disjointed die-by-die implementation approach. The platform uniquely provides system planning, integrated electrothermal, static timing analysis (STA) and physical verification flows, enabling faster, high-quality 3D design closure. It also incorporates 3D exploration flows, which take 2D design netlists to create multiple 3D stacking scenarios based on user input, automatically selecting the optimal, final 3D stacked configuration. Furthermore, the platform database supports all 3D design types, letting engineers create designs at multiple process nodes simultaneously and perform seamless co-design with package design teams and outsourced semiconductor assembly and test (OSAT) companies that use Caden...