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Atomera Breathes New Life into Moore’s Law for Power and Analog Electronics
MST-SP Technology Provides Significant Cost Reduction for These Semiconductor Products LOS GATOS, Calif.--(BUSINESS WIRE)-- Atomera Incorporated
About this update from Atomera Incorporated
[{"type":"text","content":"\nMST-SP Technology Provides Significant Cost Reduction for These Semiconductor Products\n\n LOS GATOS, Calif.--(BUSINESS WIRE)--\nAtomera Incorporated (NASDAQ:ATOM), a semiconductor materials and technology licensing company, today announced the availability of its Mears Silicon Technology® Smart Profile™ (MST-SP®) technology. MST-SP, an implementation of MST designed for use on 5V power and analog electronics, is breathing new life into Moore’s Law. Through a combination of atomic level engineering and advanced material science, Atomera is squeezing more capability and capacity out of today’s semiconductor processes. The resulting improvements in power, performance and area (PPA) — the standard measure of Moore’s Law — are effectively enabling the industry to get smaller die size using the same process node.\n\nWhile digital chip technologies have benefitted greatly from Moore’s Law, there is a significant market for Bipolar CMOS-DMOS (BCD) semiconductors that are built today in legacy nodes ranging from 40nm to 180nm. According to The McClean Report from IC Insights, the major user of BCD processes is the Power Management ICs (PMICs) sector, which had a market size of $14.6 billion in 2020 and is forecast to grow to $24.9 billion in 2025. The growth can be attributed to the projected increase in mobile and other devices that use sophisticated power management techniques. For example, according to Hui He, an analyst at research firm Omdia, as reported by the Wall Street Journal, “A typical 5G smartphone can hold as many as eight power-management chips, compared with two to three in a 4G phone.”\n\n“I have worked in the analog and power device sector for a long time and have witnessed firsthand the challenges to scaling these devices compared to digital,” said Lou Hutter, principal at Lou Hutter Consulting. “Combining this ‘scaling gap’ with the increasing prevalence of these devices is certainly one of the factors behind industry shortages we see in these devices. Atomera’s MST-SP technology can significantly shrink the power transistors that routinely occupy 40%-80% of the area in a PMIC, which enables manufacturers to get 20% more die per wafer — and with lower power consumption to boot.”\n\nBCD technologies face more difficult scaling challenges than their digital counterparts and as a result have not seen the process node ...