Press release
Applied Materials Advances Heterogeneous Chip Integration with New Technologies for Hybrid Bonding and Through-Silicon Vias
New materials and systems enable chipmakers to increase the performance and reliability of hybrid bonding, the industry’s most advanced interconnect
About this update from Applied Materials, Inc.
[{"type":"text","content":"New materials and systems enable chipmakers to increase the performance and reliability of hybrid bonding, the industry’s most advanced interconnect technologyNew deposition systems improve the density, performance, quality and cost of chips stacked using TSV technology SANTA CLARA, Calif., July 10, 2023 (GLOBE NEWSWIRE) -- Applied Materials, Inc. today introduced materials, technologies and systems that help chipmakers integrate chiplets into advanced 2.5D and 3D packages using hybrid bonding and through-silicon vias (TSVs). The new solutions extend Applied’s industry-leading breadth of technologies for heterogeneous integration (HI). HI helps semiconductor companies combine chiplets based on a variety of functions, technology nodes and sizes in advanced packages, enabling the combination to perform as a single product. HI helps solve industry challenges created in part because the need for transistors in applications like high-performance computing and artificial intelligence continues to increase at an exponential rate, while the ability to shrink transistors with classic 2D scaling is slowing and becoming more expensive. HI is a core component of a new playbook that enables chipmakers to improve chip performance, power, area-cost and time to market (PPACt) in new ways. Applied is the largest supplier of technologies for HI with optimized chipmaking systems spanning etch, physical vapor deposition (PVD), chemical vapor deposition (CVD), electroplating, chemical mechanical polishing (CMP), annealing and surface treatments. “Heterogeneous integration is growing rapidly because it helps chip and systems companies overcome the limits of classic 2D scaling, which no longer delivers simultaneous improvements in performance, power and cost,” said Dr. Sundar Ramamurthy, Group Vice President and General Manager of HI, ICAPS and Epitaxy, Semiconductor Products Group at Applied Materials. “Our latest HI solutions advance the industry’s newest ways to pack more transistors and wiring in 2.5D and 3D configurations to increase system performance, reduce power consumption, minimize size and speed time to market.” Making Hybrid Bonds Stronger and Better Chip-to-wafer and wafer-to-wafer hybrid bonding can be used to connect chips using direct, copper-to-copper bonds that enable the combined elements to perform as one. Hybrid bonding is the in...